1. In microprogrammed processors, an instruction fetched from memory is interpreted by a micro program stored in a single control memory CM; whereas in other microprogrammed processors, the micro instructions are not directly used by the decoder to generate control signals. This is achieved by the use of a second control memory called a Nano control memory (nCM).
2. So now there are two levels of control memories, a higher level control memory is known as micro control memory (µCM) and a lower level control memory is known as Nano control memory (nCM). This is shown in Figure 7.
3. Thus a microinstruction is in primary control-store memory, it then has the control signals generated for each microinstruction using a secondary control store memory The output word from the secondary memory is called Nano instruction
4. The µCM stores micro instructions whereas nCM stores nano instructions. The decoder uses Nano instructions from nCM to generate control signals. Thus Nano programming gives an alternative strategy to generate control signals. The process of generation of control signals using nano instructions is shown in Figure 7.

1. Nano instruction addresses are generated by a nano program counter and nano instructions are placed in a register nIR. The next address of nIR is directly obtained. The next address is generated by either incrementing the nano program counter or loading it from external source(branch field or address from micro instruction opcode)

Advantages of Nano programming

1. Reduces total size of required control memory In two level control design technique, the total control memory size S2can be calculated as

   S2 = Hm x Wm+ Hn x Wn

   Where Hmn represents the number of words in the high level memory

   Wm represents the size of word in the high level memory

   Hn represents the number of words in the low level memory

   Wn represents the size of word in the low level memory

   Usually, the micro programs are vertically organized so Hmis large and Wmis small.

   In Nano programming, we have a highly parallel horizontal organization, which makes Wn large andHnis small. This gives the compatible size for single level control unit as

   S1= Hmx Wn which is larger than S2. The reduced size of control memory reduces the total chip area.

2. Greater design flexibility Because of two level memories organization more design flexibility exists between instructions and hardware.

Disadvantage of Nano programming

1. Increased memory access time: The main disadvantage of the two level memory approaches is the loss of speed due to theextra memory access required for Nano control memory.