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Compare RISC and CISC architecture.

written 8.5 years ago by nilimazade.mtech • 90

modified 2.9 years ago by sagarkolekar ★ 11k

computer organization and architecture

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written 8.5 years ago by nilimazade.mtech • 90

-	RISC	CISC
1	RISC stands for Reduced Instruction Set Computer	CISC stands for Complex Instruction Set Computer
2	RISC processors have simple instructions taking about one clock cycle. The average Clock cycles Per Instruction(CPI) of a RISC processor is 1.5	CISC processors have complex instructions that take up multiple clock cycles for execution. The average Clock cycles Per Instruction of a CISC processor is between 2 and 15
3	There are hardly any instructions that refer memory.	Most of the instructions refer memory
4	RISC processors have a fixed instruction format	CISC processors have variable instruction format.
5	The instruction set is reduced i.e. it has only few instructions in the instruction set. Many of these instructions are very primitive.	The instruction set has a variety of different instructions that can be used for complex operations.
6	RISC has fewer addressing modes and most of the instructions in the instruction set have register to register addressing mode.	CISC has many different addressing modes and can thus be used to represent higher level programming language statements more efficiently.
7	Complex addressing modes are synthesized using software.	CISC already supports complex addressing modes
8	Multiple register sets are present	Only has a single register set
9	RISC processors are highly pipelined	They are normally not pipelined or less pipelined
10	The complexity of RISC lies in the compiler that executes the program.	The complexity lies in the micro program
11	The most common RISC microprocessors are Alpha, ARC, ARM, AVR, MIPS, PA-RISC, PIC, Power Architecture, and SPARC.	Examples of CISC processors are the System/360, VAX, PDP-11, Motorola 68000 family, AMD and Intel x86 CPUs.

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