Solution:
a) circuit using thermal noise current:
Representing the thermal noise of $M_1$ and $M_2$ by current sources and noting that they are uncorrelated we write.
$
V_{n, 0 u t}^2=4 \mathrm{KT}\left(r g m_1+g m_2\right)\left(r_0 111 r_2\right)^2
$
Since the voltage gain is equal to $g m_1\left(\mathrm{rO}_1 11\left(\mathrm{YO}_2\right)\right.$, the total noise voltage referred to the gate of $M_1$ is
$
v_{n_1,{ }^2 \text { n }}=4 k T\left(r g m_1+r g m_2\right) \frac{1}{g m_1^2}....(1)
$
$$
V_{{\text {sin }}}^2=4 k T n\left(\frac{1}{g m_1}+\frac{g m_2}{g m_1^2}\right)-\text { (3.) }
$$
To compute the total output noise we integrate (1) across the bond,
$
V_{n_1^2 \text { out, } t_{0 t}}=\int_0^{\infty} \frac{4 k T r\left(g m_1+g m_2\right)\left(r_0 \| r_{02}\right)^2 d f}{1+\left(r 0.11 r_{02}\right)^2 c_2^2(2 \pi f)^2}\\
$
Why gm, should it be maximized and gm should it be minimized?
depends upon $g m_1 8 g m_2$, confirming that $g m_2$ must be minimized because $m_2$ serves as a current source rather than a trans conductor.
$\rightarrow$ The noise currents of both transistors flow through re, $11 \mathrm{ro}_2$. However $M_1$ \& $M_2$ both exhibit different noise effects.
$\Rightarrow$ This because as $\mathrm{gm}$, increases, the output noise voltage rises in proportion to $\sqrt{g m}$, whereas the voltage gain of the stage increases in proportion to $\mathrm{gm}$.
$\rightarrow$ As a result, the input-referred noise voltage decreases.
$\rightarrow$ Such a trend doesnat apply to $\mathrm{M}_2$ $\rightarrow$ Hence $g m$, must be maximised and $g m_2$ must be minimised in the given circuit.