VHDL:

• VHDL is a acronym for “VHSIC Hardware Description Language” while VHSIC is acronym for “Very High Speed Integrated Circuits“.
• It is IEEE standard for describing digital hardware used by industry worldwide.
• VHDL is a hardware description language that can be used a model a digital system at many levels of abstration, ranging from the algorithmic level to the gate levels.

Structure of VHDL Module:

• The Main component of VHDL module consist of following declaration.

  1) Package

  2) Entity

  3) Architecture

  4) Configuration

• The following fig. shows the relationship of these basic blocks of VHDL program.

• A design may include any number of packages, entity, and Architecture and configuration declaration.
• The entity and architecture blocks are compulsory but packages and configuration blocks are optional.

$$\text{Fig: Relationship of VHDL Design units}$$

• Modelling IC with VHDL

1. Basic Idea:

   • Component based design using abstract/refined implementation of component.

2. Entity:

   • Define the interface with the exterior of the component.

     Interface = Input and Output ports.

     • Communication between entities assured by signals(equivalent to wires)

3. Architecture:

   • Specifies the functionality of component

     i) Behavioural – A process with sequential, operations, control flows instruction if, while, for loops etc…

     ii) Data Flow: Concurrent Statements.

     iii) Structural: Entities + interconnections.

4. Process – Unit of concurrency

   • process instruction are sequential.
   • store value in process variable.

5. Describe timing and delay

   Example:

   • Used in simulation.
   • It support both the concurrency and delay observed in digital electronics system.

• Reasons for using VHDL:
  • IEEE standard used by industry worldwide
  • Allow for various design methodologies.
  • Provides reusuable design documentation.
  • Testing and validation using simulation.
  • Used for formal specification and verification
  • Automatic synthesis.
  • Perfomance prediction.