Rules for designing a low Phase Noise oscillator are as follows:

• First maximize the resonator Loaded-Q. To do this in the series resonant circuits use a large Inductor, and in parallel circuits use a large Capacitor. Coupling the resonator tightly to the oscillating device, and minimize the coupling of the load to the circuit.
• A 10dB increase in Loaded-Q results in a 20dB improvement in Phase Noise.

• Build the resonator using high-Q components, having constant and quiet noise.

• Low losses are required in all of the constituent parts of the circuit including PCB. To be carefully considered the series resistance of the reactive components. Coupled losses in the rest of the circuit should be at most equal to the resonator losses. To get best Phase Noise, the resonator losses should be x3 the circuit losses.

• Use an active device with low noise figure at low frequencies.
• Use an active device with low 1/f flicker noise, with good bias circuit. The DC current set to get the best 1/f flicker noise should be the oscillator device current.

• There is effectively a trade-off between Gain and Phase Noise performance in microwave transistors, both for the additive or multiplicative noises.

• Maximize the output Signal Power vs Noise Power of the oscillator. However, the output power increase should be implemented very carefully, since severe Phase Noise degradation can occur because of the active device noise elevation at compression.

• Extract the output signal through the resonator to the load, thereby using the resonator transmission response selectivity to filter the carrier noise spectrum.

• Optimize in noise reduction where is needed, especially consider close-in noise vs large offset noise requirements.

• Power Supply (VCC) and tuning voltage (Vtune) returns must be connected to the printed circuit board ground plane. VCO ground plane must be the same as that of he printed circuit board and therefore all VCO ground pins must be soldered direct to the printed circuit board ground plane.

• Adequate RF grounding is required. Several chip decoupling capacitors must be provided between the VCC supply and ground.

• Good, low noise power supplies must be used to prevent AM noise. Ideally, DC batteries for both supply (VCC) and tuning (Vtune) voltages will provide the best overall performance.

• The biasing circuit of the active device should be properly regulated and filtered to avoid any unwanted signal modulation ore noise injection. Variations on the supply voltages or currents may also cause undesirable output power fluctuations and frequency drift.
• The active device should work in Class-A, to minimize the limitations in the stage that drives the resonator.
• Carefully control the limiting amplitude mechanism, so as not introduce AM noise. A signal limiter can be placed either before or after the active device, keeping its output well below the compression level.
• AM-PM conversion is minimized by choosing a 90° crossing angle between the device line and the load line.
• Phase perturbation can be minimized by using high impedance devices such as FETs, where the Signal-to-Noise ratio of the signal voltage relative to the equivalent noise voltage can be made very high.
• Output must be correctly terminated with good load impedance. It is also a good practice to use a resistive pad between the VCO and the external load.
• Connections to the tuning port must be as short as possible and must be well screened, shielded, and decoupled to prevent the VCO from being modulated by external noise sources. A low noise power supply must be used for tuning voltage.
• Minimize Frequency Pushing by the Gate or Base voltage of the transistor. Frequency Pushing is a shift in the oscillation frequency usually caused by a change in the transistor bias voltage.

• Avoid saturation of the active devices at all cost, and try to have either limiting or automatic gain control (AGC) without degradation of the Q of the resonator. Saturation of the active device can also lower the loaded-Q since the device losses will then add to those of the resonator.

• Use active components with low 1/f-noise. Flicker noise in active devices is also known as 1/f noise because of the 1/f slope characteristics of the noise spectrum (the amplitude varies inversely with frequency). Mainly traps associated with contamination and crystal defects in the emitter-base depletion layer cause this noise (in BJTs case). These traps capture and release carriers in a random fashion. The time constant associated with the process produce a noise signal at low frequencies.

• Transistors made in different processes have different 1/f noise corners. JFETs are the best (~1kHz), followed by BJTs (~5kHz), then CMOS (~1MHz), and GaAs are the worst (~10MHz).
• Consider using noise reduction via feedback, or feed-forward noise reduction techniques.