written 8.5 years ago by | • modified 8.5 years ago |
Mumbai University > COMPS > Sem 3 > Digital Logic Design and Analysis
Marks: 5 M
Year: Dec 2013
written 8.5 years ago by | • modified 8.5 years ago |
Mumbai University > COMPS > Sem 3 > Digital Logic Design and Analysis
Marks: 5 M
Year: Dec 2013
written 8.5 years ago by |
When it happens, comparator output reverses to $– V_{Z 1}$. Now $V_O$ changes exponentially towards $– V_{Z 1}$ with the same time constant and again the output makes a transition from $– V_{Z 1}$ to + $–V_{Z 2}$. whenVOequals $-β V_{Z 1}$
Let $V_{Z 1} = V_{Z 2}$
The time period, T, of the output square wave is determined using the charging and discharging phenomena of the capacitor C. The voltage across the capacitor, $V_O$ when it is charging from $– B V_Z$ to + $V_Z$ is given by
$V_O= [1-(1+β)]e^{-T/2τ}$
Where $τ = Rf C$
The waveforms of the capacitor voltage $v_c$ and output voltage $V_{out}$ (or $V_Z$) are shown in figure.
When t = t/2
$V_O= +β V_{Z \ or} + β V_{out}$
Therefore $β V_Z = V_Z[1-(1+β)e^{-T/2τ}]$
Or $e^{-T/2τ} = 1- β/1+ β$
Or $T = 2τ log_e 1+β/1- β = 2R_f C log_e [1+ (2R_3/R_2)]$