FIG. CHARGE SHARING IN DYNAMIC CMOS

1.Thw origin of charge sharing is the origin of node capacitances Cp's.

1. Initial voltage on the Cout at the start of evaluation interval is VOUT =VDD.

3.Assuming that capacitor volatge across all the Cp's is 0V.

1. Initially the total initial charge in the circuit is

Q=CLVDD...............(1)

1. Consider the worst case charge sharing condition for this circuit is when the inputs (A,B,C)=(1,1,0)

2. With C=0, there is no discharge path to ground so that the output voltage should remain high. As shown in figure CL is electrically connected to all the three Cp's. The current I flows as VOUT is at higher potential than the voltage across Cp's .

3. The CP   connected to source of the NMOS with input C never comes into play as C=0 hence NMOS with input C acts as open circuit. Only the Cp connected to soprce of NMOS with A and B comes in play.

4. Over a period a time a stage comes when CL=CP(across nmos with i/p A)=Cp(across nmos with i/p B). Also the voltage across VL  becomes equal to volatge across both Cp's let say it is VF. Therefore the total charge distribution is now given as

Q=CLVF+CPVF+CPVF.....................(2)

1. According to the law of conversion of charge eqn(1)=eqn(2).

CLVDD=CLVF+CPVF+CPVF

$V_F = \dfrac{(CL\times VDD)}{(CL+CP+CP)}$

However, $ \dfrac{CL}{(CL+CP+CP)}$   is less than 1

1. VF<VDD , This implis charge sharing reduces the voltage on output node to keep Vout high the capacitor CL>>CP+CP this may be difficult to achieve since the capacitor values are determined by layout dimensions.

2.  After charege sharing takes place the node are still subjected to charge leakage which also contributes to drop in voltage with time