Programming techniques of EEPROM are as follows:

Channel Hot Electron Injection

The influence of the drain bias VD on the surface potential reduces the conductivity of the channel near the drain edge, thus increasing the lateral potential drop in the drain region. Therefore, E(parallel) presents a larger value in proximity of the drain diffusion and the channel electrons reach very high energy values at the end of the channel.

As schematically depicted in Fig., the hot electrons, near the drain region, have enough energy to overcome the Si-SiO2 energy barrier and they are injected into the Floating Gate, attracted by the oxide electric field EOX. Moreover, the channel hot electrons generate electron-hole pairs by means of Impact Ionization events in proximity of the drain edge of the channel. The generated secondary holes are collected by the substrate contact and they originate the substrate current IB. The generated secondary electrons, instead, have enough energy to be injected themselves into the gate oxide, thus giving a small additional contribution to the gate current  IG. Therefore the gate and the substrate currents have a common origin, namely the electrons accelerated while travelling along the channel.

The injection efficiency strongly depends on the lateral electric field, that heats the channel electrons, and on EOX in proximity of the drain that influences the tunnel probability TB.EOX for the hot electrons. Near the drain region the VD influence on surface potential reduces the available potential drop in the oxide VOS, hence EOX and TB.EOX . Moreover, during programming the FG potential decreases (VFG), thus further reducing VOx and, consequently TB.EOX . The VFG reduction, moreover, decreases the drain current in the channel, thus further hampering the programming speed. 

Fowler - Nordheim Emission

Fowler Nordheim Emission is a Technique where in the gate geometry is modified so that a portion of the Floating gate extends over the n+ drain as shown in Fig below

For Programming both the Drain & Source are held at ground potential whereas the gate terminal is held at high Potential. The cell circuit in figure below accomplishes the Write operation by pulsing the Program line while the word line is at WL = 1 & the bit & source line are both grounded 

Erasure is accomplished by reversing the polarity of the applied voltages. General EPROM Arrays allow bit reassure, while Flash EPROMs are wired in a manner that erases large blocks of cells simultaneously.