The Manchester carry scheme is a particularly elegant approach to dealing with CLA bits. It is based on building a switch-logic network for the basic equation,

that can be cascaded to feed to successively stages.

Consider a full adder with inputs ai,bi and ci. We will use the generate and propogate expression

to introduce the carry-kill ki bit such that

This term gets its name from the fact that if ki=1, then pi=0 and gi=0, so that ci+1=0;ki=1 thus kills the carry-out bit.

Static Manchester carry circuit.

The static logic gate in figure uses ci(bar) as an input. First, suppose that pi=0. This opens M1 and blocks the input ci from propagating through, but also turns on nFET M3.

If gi=0, pFET M4 is on and pulls the output to ci+1(bar)=1. If gi=1 then both nFETS M2 and M3 are on while M4 is off, giving output of ci+1(bar)=0. The case where pi=1 is more complicated. The generated term  must be 0, so pFET M4 is on while the nFET chain act as an open circuit M3 is off. The output is then controlled by ci(bar). If ci(bar)=1 then this is transmitted to the output and supported by the pFET connection to the power supply so that ci+1(bar)=1.

Dynamic circuit.

A dynamic circuit is shown in the figure. The logic is similar to the static design except that the evaluation nFET M3 replaces a logic transistor. During the precharge (∅=0), the output node is brought to a logic 1 voltage. Evaluation takes place when the clock switches to ∅=1. A carry propagation occurs if pi=1, while the node discharges to 0 if gi=1.

Manchester carry circuit using carry kill signal.

MODL Circuits

Multiple-Output Domino Logic (MODL) is the extension of the basic domino circuit. This type of circuit allows two or more outputs from a single logic gate, making it quite unique. The structure of a 2-output MODL stage is shown in the figure.

The logic array has been split into two separate blocks denoted as F and G, which creates an additional output node. Adding an inverter and a precharge transistors results in the two outputs

f1=G and f2=F.G

If the G-logic block acts like a closed switch, then it produces an output of f1=G. If this occurs, then it is possible for the second logic block F to induce a discharge by also acting as a closed switch. This dependence produces the ANDing relation between the two outputs. While this is quite restrictive, the nesting of the AND operation does appear in several important computational algorithms such as the carry look-ahead adder.