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Draw and explain Weighted resistor type DAC for 3 bits input taking suitable example.
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Answer:  

The binary-weighted-resistor DAC employs the characteristics of the inverting summer Op Amp circuit. In this type of DAC, the output voltage is the inverted sum of all the input voltages. If the input resistor values are set to multiples of two: 1R, 2R and 4R, the output voltage would be equal to the sum of V1, V2/2 and V3/4. V1 corresponds to the most significant bit (MSB) while V3 corresponds to the least significant bit (LSB).The circuit for a 3-bit DAC using binary weighted resistor network is shown below:

The binary inputs have values of either 0 or 1. The value 0, represents an open switch while 1 represents a closed switch. The operational amplifier is used as a summing amplifier, which gives a weighted sum of the binary input based on the voltage. If the digital input is $d=1$ then the switch will connect resistor $2^1R$ to a negative reference voltage. The current will flow through binary weighted resistor if switch connect resistor to reference voltage.

Applying KCL to node 2 ,

$I_1+I_2+I_3=I_{in}+I_f$

Cuurent going into op-amp terminal is zero , hence $I_{in}=0$ 

Now , $I_1=\dfrac{-V_R-V_2}{2^1R} , \ I_2=\dfrac{-V_R-V_2}{2^2R}, \ I_3=\dfrac{-V_R-V_2}{2^3R} , \ I_f=\dfrac{-V_R-V_2}{R_f}$

Substituting all the values in (1) , we get 

From virtual ground concept , node 1 is at ground potential and node 2 is also at ground potential.$\therefore V_2=0$

$\therefore \dfrac{R_f}{R}V_R[d_12^{-1}+d_22^{-2}+d_32^{-3}]=V_0$

$\therefore V_0=V_R[d_12^{-1}+d_22^{-2}+d_32^{-3}]$

By substituting different values of digital input , we will get corresponding output.

Following table shows the possible combination of digital input $d_1 , \ d_2, \ d_3$ and analog output $V_0$ for 3 bits.

d1 d2 d3 V0
0 0 0 0
0 0 1 $\dfrac{V_R}{8}$
0 1 0 $\dfrac{2V_R}{8}$
0 1 1 $\dfrac{3 V_R}{8}$
1 0 0 $\dfrac{4V_R}{8}$
1 0 1 $\dfrac{5V_R}{8}$
1 1 0 $\dfrac{6V_R}{8}$
1 1 1 $\dfrac{7V_R}{8}$
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