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Design a 4:1 multiplexer using only NAND gates.
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S0 S1 Output
0 0 A0
0 1 A1
1 0 A2
1 1 A3

 

Output = S0'.S1' + S0'.S1 + S0.S1'+ S0.S1

  • First draw a combinational circuit using basic AND/OR gates for the given Output Equation
  • The second step is to replace the AND/OR gates with NAND gate as per the boolean conversion.

For 2 inputs X and Y

X OR Y= NOT[ NOT( X AND X ) AND NOT( Y AND Y )]

X AND Y=  NOT[ NOT( X AND Y ) AND NOT( X AND Y ) ]

 

  • A0,A1,A2 and A3 are the inputs to the 4:1 multiplexer and Output is the required output
  • S0,S1 is the required select lines for the multiplexer .
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