a) TEST.

b) RQ/GT0.

c) RQ/GT1.

d) QS0 and QS1.

e) S0,S1,S2.

1.TEST:-

• It is an active low input line dedicated for 8087 co-processor.
• In Maximum Mode whenever the co-processor is busy it makes this pin high.
• TEST input is examined by the WAIT instruction.
• If this pin is high, the microprocessor enters idle state; till TEST pin becomes low i.e.8087 is free.

2.RQ/GT0

• In Maximum Mode it carries the bi-directional Request/Grant signal.
• The external bus master (8089 or 8087) sends an active low pulse to request for the control over the system bus.
• In response the 8086 completes the current bus cycle, releases the system bus and sends an active low Grant pulse on the same line to the external bus controller.
• 8086 gets back the system bus only after external bus master sends an active low release pulse on the same line.

3.RQ/GT1

• This has the same fuction as RQ/GT0 in maximum mode but it is of lower priority.

4.QS0 and QS1

• In Maximum Mode it is used to indicate the Instruction Queue Status.

• When QS1 and QS0 are 00 then Queue status indicates no operation.

• When QS1 and QS0 are 01 then the Queue status indicates that first byte of opcode is to be fetched from the queue.
• When QS1 and QS0 are 10 then the Queue status indicates to empty the queue.
• When QS1 and QS0 are 11 then the Queue status indicates that subsequent byte is to be fetched from the queue.
• Refer following table.
• 

5.S0,S1,S2

• In Maximum mode these are used to generate proper control signal.
• Following table shows the operation of these pins.
•