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NMOS Current Source Numerical
written 5.6 years ago by | • modified 5.6 years ago |
Design an NMOS current source to provide a bias current of IQ=100μA and an output resistance greater than 20MΩ. The reference current is to be IREF=150μA. The circuit is to be biased at ±3.3V and the voltage at the drain of the current source transistor is to be no smaller than -2.2V. The minimum width to length ratio of the transistor is to be unity.
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