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The single-phase fully-controlled bridge converter is shown in Fig.1(a). Ls is the source inductance. The load current is assumed constant. The a.c. supply may be represented by its Thevenin's equivalent circuit, each phase being a voltage source in series with its inductance. The major contributor to the supply impedance is the transformer leakage reactance. The equivalent circuit of fully controlled single converter is shown in Fig.1(b). When the terminal L of the source voltage, es, is positive, then the current flows through the path L−Ls−T1−R−L−T2−N. This is shown as e1,Ls,T1,T2, and load in Fig.1(b). Similarly, when terminal N of source voltage, es, is positive, load current flows through the path N−T3− load −T4−Ls−L. This is shown as e2,Ls,T3,T4 and load in Fig.1(b). The related circuit voltage and current waveforms are shown in Fig.2.
When T1,T2 are triggered at a firing angle α, the commutation of already conducting thyristors T3,T4 begins. Because of the presence of source inductance Ls, the current through outgoing thyristors T3,T4 decreases gradually to zero from its initial value of Id, whereas in case of incoming thyristors T1,T2, the current builds up gradually from zero to full value of load current, Id. During the commutation of T1,T2 and T3,T4, i.e. during the overlap angle μ, KVL for the loop OPQRO of Fig.2 ignoring SCR drops, gives
e1−LsdiT1dt=e2−Lsdi3dt
or e1−e2=LS(diT1dt−di3dt)−−−−−(1)
But from Fig.2, we have the relations
e1=Emsinωt and e2=−Em⋅sinωt
Substituting in Eq.1 we get
Ls(diT1dt−di3dt)=2Em×sinωt−−−−−(2)
Since the load current is assumed constant, we can write
iT1+iT3=Id−−−−−(3)
Differentiating Eq.3, with respect to t
diT1dt=diT3dt−−−−−(4)
Substitute Eq.4 in Eq.3, we get
Ls(2diT1dt)=2Em⋅sinωt
∴diT1dt=EmLssinωt−−−−−(5)
If the overlap angle is μ, then the current through thyristor pair T1,T2 builds up from zero to Id during this interval.
Therefore, at ωt=α,iT1=0 and at ωt=(α+μ),iT1=Id
∴ Therefore, from Eq.5 we can write
∫Id0diT1=EmLs∫(α+μ)/ωα/ωsinωt⋅d(ωt)
∴Id=EmωLs[cosα−cos(α+μ)]−−−−−(6)
It can be observed from Fig.2 that the output voltage is zero during the interval μ. There are two commutations in each cycle. Thus, the average output voltage is given by
Edc=Emπ∫π+αα+μsinωt⋅d(ωt)=Emπ[−cosωt]π+αα+μ
=Emπ[cos(α+μ)−cos(α+π)]
∴Edc=Emπ[cosα+cos(α+μ)]−−−−−(7)
Now, from Eq. 5, we have
cos(α+μ)=cosα−ωLsEmId
Substituting this value of cos(α+μ) in eq. 7, we get
Edc=Emπ[cosα+cosα−ωLsEmId]Edc=2Emπcosα−ωLsEmId−−−−−(8)
Also, from Eq. 6, we have, cosα=ωLsEmId+cos(α+μ)
Substituting this value of cosα in Eq. 7, we get
Edc=2Emπcos(α+μ)+ωLsπId−−−−−(9)
With the help of Eq.8 a d.c. equivalent circuit for a two-pulse single-phase fully-controlled converter can be drawn, as shown in Fig.3.
Diode D in Fig.3 indicates that load current is unidirectional. This equivalent circuit shows that the effect of source inductance is to present an equivalent resistance of magnitude ωLsπ in series with interval voltage of rectifier 2Emπcosα . With the load current Id the votage drop is ωLsIdπ. Hence it becomes clear that with source inductance, the output voltage of a converter is reduced by ωLsIdπ value. The variation of output-voltage with output-current is shown in Fig.4. From this Fig.4, it is also clear that as load current Id (or source inductance) increases, the commutation interval or the overlap angle increases and as a consequence, the average output voltage decreases.
Thus, in single-phase fully-controlled converter, as long as commutation angle μ is less than π the output voltage is given by Eq.7 and when μ is equal to π the load will be permanently short-circuited by SCRs and the output voltage will be zero because during the overlap period, all SCRs will be conducting.