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Modified Series Inverter
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Some of the limitations of basic series inverter circuit of can be overcome by making some modifications in the basic form. One such modification is to replace the normal inductance by a mutually-coupled inductance as shown in Fig.1. Inductors L1 and L2 have the same inductance and are closely coupled. It can be seen that even if SCR T2 is triggered a little before SCR T1 is turned-off, there will not be any possibility of short circuit at the d.c input source.

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Let us suppose that SCR T2 is triggered shortly before SCRT1 is turned-off. At the instant when SCRT2 is triggered, the voltage across the capacitor will be slightly less than (Ec+Edc) and the load voltage and current will be closed to zero. Hence, a voltage equal to the voltage across the capacitor minus the load voltage will appear across L2 . Since L1 is closely coupled to L2, the same voltage will appear across L1 . The voltage across L1 will tend to increase the cathode potential of SCRT1 more than its anode potential and therefore, SCRT1 will be reverse-biased and turn-off. Thus, even if SCRT2 is turned-on before SCRT1 is switched-off, it will not result into short circuiting of the d.c. source. A similar operation will take place if SCRT1 is triggered before SCRT2 is turned-off.

Hence, we can increase the limit of output frequency to more than the resonance frequency of the RLC resonant circuit.

Further, the drawback of high pulsed current from the d.c. supply can be overcome in a half bridge configuration as shown in Fig.2 where L1=L2 and C1=C2 . The power is drawn from the d.c. source during both half-cycles of output voltage. One-half of the load current is supplied by capacitor C1 or C2 and the other-half by the d.c. source.

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Initially, capacitor C2 is assumed to be charged to voltage Ec with upper plate negative and lower plate positive. As the capacitors C1 and C2 together are connected across the battery, the total voltage across C1 and C2 should be equal to Edc . Therefore, C1 will be charged to (Edc +Ec) value with upper plate positive. The various voltage and current waveforms of this circuit are shown in Fig.3.

As shown in Fig.3 , thyristor T1 is triggered at instant 0 . With this, the two currents flow through the thyristor T1 and load R. Current i1 flows through the path Edc+ T1L1RC2+C2Edc thus charging C2 . Capacitor C1 which is already charged at this instant will provide the second current i2. This discharge current i2 has the path C1+T1L1R C1.

Since the driving voltage (Edc+Ec) the capacitors C1,C2 and the initial conditions are identical for both these paths, the two currents i1 and i2 will always be equal. Hence, 50% of the load current is drawn from the input source and 50% from the discharge of the capacitor.

At the end of the half-cycle , when the load current becomes zero, SCRT1 will be turned-off and the voltage across the capacitors reversed. In the steady state, capacitor C2 will be charged to voltage (Edc+Ec) in the opposite direction and capacitor C1 to Ec. When SCRT2 is triggered at instant Q,identical operation will takes place in the following negative half cycle.

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Again, 50% of the load current is obtained from the d.c. input source and the rest 50% from the discharge of capacitor C2 . Hence, the input d.c supply no more remains intermittent in nature and the ripples are reduced to the minimum.

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