Ramp and Pedestal Triggering Circuit of SCR

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written 5.8 years ago by

teamques10 ★ 69k

Figure 1 shows the circuit for ramp-and-pedestal triggering of two thyristors connected in anti-parallel for controlling power in an ac load. Ramp and pedestal triggering is an improved version of Synchronized UJT Oscillator triggering. The various voltage-waveforms are shown in Fig.2

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Zener-diode voltage, $V_{z},$ is constant at its threshold-voltage. $R_{p}$ …

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