Power can be delivered to the load in Half wave during the positive half-cycle of $e_{s}$ because the SCR conducts only when it is forward biased. This limitation can be overcome in several ways, one of which is shown in Fig.1. Here, the ac line voltage is converted to pulsating dc. by the full-wave diode bridge. This allows the SCR to be triggered "on"" for both half-cycle of the line voltage, which doubles the available power to the load.

In this circuit, the initial voltage from which capacitor C charges is almost zero. Capacitor C is set to this low positive voltage (upper plate positive) by the clamping action of SCR gate. When the capacitor charges to a voltage equal to $V_{g t}$ SCR triggers and rectified voltage $E_{\mathrm{dc}}$ appears across load as $e_{L} .$ The value of $R_{v}C$ is obtained from the following relation:

$$R_{v} C \geq 50 \frac{T}{2}=\frac{157}{w}$$

The value of $R_{v}$ is given by

$$R_{v} \leq \frac{e_{s}-V_{g t}}{I_{g(\min )}}$$