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Design Consideration for Class D Commutation
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(a) Design of commutating capacitor : The magnitude of the commutating capacitor is dependent on the following circuit parameters:

(i) Maximum load current to be commutated

(ii) Turn-off time of SCR, toff

(iii) The battery voltage Edc

The turn-off time t off  of SCR T1 is known from the manufacturer's data sheet. The capacitor voltage changes from Edc to 0 during turn-off time, t off  Assuming load current, IL, remains constant during turn-off time, t off 

CEdc=ILtoff

C=ILtoffEdc

(b) Designing of commutating inductor : The design of the inductor L is actually dependent on two contradictory criteria as follows:

(i) The acceptable maximum capacitor current, IC when thyristor T1 is fired.

(ii) The time interval (t2t1) during which capacitor voltage must reset to correct polarity for commutating SCR T1 .

Since the capacitor current (IC) is an oscillatory current through SCR T1,L,D and C when SCR T1 is triggered. Therefore the peak value of current IC is given by the expression,

IC(peak)=EdcWrL(1)

where Wr=1LC rad/sec.(2)

Substitute Eq. (2) in Eqn (1). We get

IC(peak)=EdcCL(3)

Also, periodic time during oscillation Tr is given by

Tr=2πWr=2(t1t2)

Now, let IL(max be the maximum current through SCR T_{1} . From Eq.(3)

E_{\mathrm{dc}} \sqrt{\frac{C}{L}} \leq I_{L_{(\max )}}

OR

L \geq C .\left(\frac{E_{\mathrm{dc}}}{I_{L_{(\max )}}}\right)^{2}

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