written 8.8 years ago by | • modified 8.8 years ago |
Mumbai University > EXTC > Sem 3 > Analog Electronics 1
Marks: 8 M
Year: Nov 2013
written 8.8 years ago by | • modified 8.8 years ago |
Mumbai University > EXTC > Sem 3 > Analog Electronics 1
Marks: 8 M
Year: Nov 2013
written 8.8 years ago by |
Fig1 (a) determining Rth (b) determining VG
Calculation for Rth
Rth=R1||R2
=910k||110k
=98.13kΩ
Calculation for VG
VG=VDD×R2R1+R2
=20×110k910k+110k
=2.16V
Simplified circuit
Fig2 thevenin’s equivalent circuit
Applying KVL to gate-source loop
IGRth+VG−VGS−IDRS=0
Put IG=0
VGS=VG−IDRS……………(1)
Put ID=0 in eq(1), then VGS=VG=2.16V
Put VGS=0 in eq(1), then ID=VGSRS=2.160.51k=4.235mA
ID=IDSS(1−VGSVp)2
ID=10m(1+VGS3.5)2
IDQ=5.6mA,VGSQ=−0.7V
Applying KVL to drain-source loop
VDD−VDS−ID(RS+RD)=0……………(2)
Put ID=0 in eq(2), then VDS=VDD=20V
Put VDS=0 in eq(2), then ID=VDSRS+RD=200.51k+2.2k=7.38mA
VDSQ=4.4V