Entity decoder is port ( x : in std_logic_vector (2 down too)

Y : out std_logic_vector ( 0 down to 7 )

en : in std_logic) ;

End decoders;

Architecture behavioral of decoder is signal Y 1 : std_logic_vector (7 down to 0) ;

Begin Y1 < = “0111 111” when z = “ 000 “ else

“10111111” when x = “001” else

“11011111” when x = “010” else

“11101111” when x = 011” else

“11110111” when x = “100” else

“11111011” when x = “101” else

“11111101” when x = “110” else

“11111110” when x = “111” else

“11111111” when others;

Y < = y, when en = ‘0’ else “1111 1111” ;

End behavioral.