Using the controller design process, we can complete the design of the controller. The steps are as follows:

1) Capture the FSM

The FSM for the soda dispenser's controller is as shown in the figure.

2) Set up the architecture

As indicated by the controller's FSM, the state machine's architecture has 2 inputs (c and tot_lt_s) and 3 outputs (d, tot_ld and tot_clr). We will use two bits to represent the controller's states, naming the current state signals s1 and s0 and the next state signals n1 and n0. The corresponding controller architecture is shown in figure.

3) Encode the states.

A straighforward encoding of the soda dispenser's four states is: $Init:00, Wait:01, Add: 10 and Disp:11$

4) Fill in the truth table

From the controller architecture set up above, we know that the truth table must have 4 inputs (c, tot_lt_s, s1 and s0) and 5 outputs (d, tot_ld, tot_clr, n1 and n0). With 4 inputs, the table will have $2^4 = 16$ rows as in figure.

By examining the outputs specified in the controller FSM, duplicated for convenience in figure, we can fill in the d, tot_ld and tot_clr columns in the truth table. For example, figure shows that when the controller FSM is in state Init, d =0, tot_clr=1 and tot_ld is implicitly 0. Thus, for rows in the truth table that correspond to state Init - namely the four rows where s1s0 = 00, since we chose "00" as the encoding for the Init state - we set the d column to 0, the tot_clr column to 1 and the tot_ld column to 0.

We fill in the next state columns n1 and n0 based on the transitions specified in the controller FSM and the state encoding chosen in the earlier step. For example, consider the Wait state. As indicated in the figure, the FSM transitions to the Add state when c=1. Thus, for rows where s1s0c = 011 (s1s0=01 corresponds to the Wait state), we set the n1 column to 1 and the n0 column to 0 (n1n0 = 10 corresponds to the Add state). When c=0, the FSM transitions to the Disp state if tot_lt_s=0 or remains in the Wait state of tot_lt_s=1.

We represent the transition from Wait to Disp in the truth table by setting n1 to 1 and n0 to 1 (Disp) in the row where s1s0 = 01 (Wait), c=0 and tot_lt_s=. Similarly, we represent the transition from Wait back to Wait by writing n1n0=01 where s1s0=01, c=0 and tot_lt_s=1. We then examine the remaining transitions in a similar way, filing in the appropriate values for n1 and n0 until all transitions are accounted for. The completed truth table is shown in figure.

5) Implement the Combinational Logic

For each of the truth table's outputs, we write the corresponding Boolean equation. From the truth table we obtain the following equations:

d = s1 s0

tot_ld = s1 s0'

tot_clr = s1' s0'

n1 = s1' s0 c' tot_lt_s' + s1' s0 c

n0 = s1' s0' + s1' s0 c' + s1 s0'

n0 = s0' + s1' s0 c'

Note that the first four equations derived from the truth table are already minimized. The fifth equation, corresponding to n0, can be minimized to s0' + s1' s0 c' through alegbraic methods, or by using a K - map as shown in figure.

We convert the above Boolean equations into an equivalent two level gate based circuit. This conversion is straightforward since the Boolean equations are already in sum of products form. The final sequential controller circuit and the datapath for the soda dispenser as shown in figure.