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Module 2 - Unit 2
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Unit 2

MOS Inverter Static Characterstics

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Noise Margin Definition

1) High Noise Margin = NMH=VOHVIH

2) Low Noise Margin = NML=VILVOL

VOH = Max O/P voltage when O/P level is logic '1'

VOL = Min O/P voltage when O/P level is logic '0'

VIL = Max I/P voltage which can be interpreted as logic 0

VIH = Min I/P voltage which can be interpreted as logic 1

Vout = f(Vin)

Vout = f(Vin+ΛVnoise)

Vout = f(Vin)+ddvinVoutVnoise + Higher order terms neglected

Resistive type nMOS Inverter :

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Assumption - 1) Channel length modulation effect is neglected

2) VSB=0 i.e No barriers => NMOS VT is always VTO

IDS=kn2(VinVTO)2

IDS=kn2[2(VinVTO)(Vout)V2out]

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Calculation of critical parameter :

1) Calculation of VOH

When Vin=0,TN is off,

we know that

Vout=VDDIRRL

Vout=VDD=VOH

=> VOH=VDD

2) Calculation of VOL

When Vin=VDD

and Vout==VOL

IR=VDDVoutRL

But IR=ID

VDDVoutRL=Kn2[(VgsVTO)VDSV2DS]

VDDVOLRL=Kn2[(VinVTO)VOLV2OL]

Quadratic equation in 1/OL correct sol is

VOL=VDDVTO+1KnRL((VDDVTO+1KnRL)22VODKnRL)1/2

  1. Calculation of VIL

When Vin>VT IN is in saturation

=> VDS>VgsVTO or Vout>VinVTO

IDS=Kn2[VinVTO]2

IR=VDDVoutRL

=> ID=IR

Kn2[VinVTO]2=VDDVoutRL

At VIC, dVoutdVin=1

Vtc=1KnRL+VTO

  1. Claculation of VIH

While Vin\gtVoutVTO TN is in linear

Vout<VinVTO

IR=ID

VDDVout2=Kn2[2(VinVTO)VoutV2out]

D.W.R.T. Vin

=> VIH=2Vout+VTO1KnRL ----------------(2)

Substitute VIH in (1) to get,

Vout(atVIH)=(2VDD3KnRL)1/2 -------------------(3)

(3) in (2)

VIH=VTO+(2VDD3KnRL)1/21KnRL

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