written 5.8 years ago by |
- What are the challenges in meeting various design/metrics/requirements?
-> Same as Q.2
- SN: (a) Oscillator cKt
-> i) Clock pulses are required for any digitalsystem Up are ES are digital system. Some $\mu$C have on chip oscillator circuit and req only a crystal to be connected externally, while some require external osc. cKt.
ii) 8051 has as on-chip osc but needs an external clock to run it.
The osc ckt generates the clock pulses so that att the internal and external operations are synchronized.
The pins XTAL1 & XTAL 2 are used to connect a crystal. The crystal is always connected along with the capacitors as shown in figure.
8051 $\mu$C are available in market with varying range of operation from 1 MH2 to 16 MHz
Generally 11.0592 MHz crystal oscillators are used so that the 8051 $\mu$C systems are compatible with the serial port.
One machine cycle comprises of oscilaator periods. Hence, to find the time for machine cycle we need to consider 1/12th of cry freq.
b) Reset cKt
-> The reset pin of a $\mu$C is either active hogh or active low
Let us consider 8051 $\mu$C
The reset pin of 8051 is active high whenever power is switched is ON, positive going pulse should be present for 2 MC on this pin.
Reset cKt for $\mu$C 8051
At to, the power supply is switched ON. The supply voltage $V_{cc}$ appears across the RC network. Then entire voltage appears across resistors R, so $V_R$ approx = $V_{cc}$ This resets the 8051.
Once the capacitor changes, then $V_R$ starts and reaches approx 0V. This removes the reset signal. The ($t_1 - t_0$) is reset time.