Commercial Microcontroller Devices Microcontrollers come in many varieties. Depending on the power and features that are needed, one might choose a 4 bit, 8 bit, 16 bit, or 32 bit microcontroller. In addition, some specialized versions are available which include features specific for communications, keyboard handling, signal rocessing, video processing, and other tasks. The examples of different types of commercial microcontroller devices are given in the following table

Micro-coded processor A processor within a processor, or a state machine that executes each different instruction as the address to a subroutine of instructions.

Hardwired processor A processor which uses the bit pattern of the instruction to access specific logic gates (unique to the instruction), which are executed as a combinatorial circuit to carry out the instruction

8051 Architecture

Pin description of 8051

Crystal Circuit

The 8051 has an on-chip oscillator but requires an external clock to run it

1)A quartz crystal oscillator is connected to inputs XTALI (pin19) and XTAL2 (pin18)

2)The quartz crystal oscillator also needs two capacitors of 30 pF value

Note: 1. C1, C2 = 30 pF + 10 pF for Crystals = 40 pF + 10 pF for Ceramic Resonators

RESET (RST)

RESET pin is an input and is active high (normally low) 1)Upon applying a high pulse to this pin, the microcontroller will reset and terminate all activities a) This is often referred to as a power-on reset v b)Activating a power-on reset will cause all values in the registers to be lost Register Reset Value

In order for the RESET input to be effective, it must have a minimum duration of 2 machine cycles

a)In other words, the high pulse must be high for a minimum of 2 machine cycles before it is allowed to go low

EA bar

EA,“external access’’, is an input pin and must be connected to Vec or GND

1)The 8051 family members all come with on-chip ROM to store programs -EA pin is connected to Vcc

2)The 8031 and 8032 family members do no have on-chip ROM, so code is stored on an external ROM and is fetched by 8031/32 -EA pin must be connected to GND to indicate that the code is stored externally

The following two pins are used mainly in 8031-based systems

PSEN, “program store enable’’, is an output pin

1)This pin is connected to the OE pin of the ROM ALE, “address latch enable”, is an output pin and is active high

1)Port 0 is also designated as ADO-AD7, allowing it to be used for both address and data

2)When connecting an 8051/31 to an external memory, port 0 provides both address and data

3)The 8051 multiplexes address and data through port 0 to save pins

4)ALE indicates if PO has address or data

• When ALE=0, it provides data DO-D7

• When ALE=1, it has address AO-A7

  In 8051 based systems with no external memory connection •Both P1 and P2 are used as simple I/O

In 8031/51-based systems with external memory connections 1)Port 2 must be used along with PO to provide the 16-bit address for the external memory

2)PO provides the lower 8 bits via AO — A7

3)P2 is used for the upper 8 bits of the 16-bit address, designated as A8 — A15, and it cannot be used for I/O

8051 Memory Organization:- We will discuss about Memory Organization of Microcontroller 8051 Family. Most microprocessors implement Von Neuman architecture for memory but, the 8051 implements Harvard architecture for its memory. A separate memory space for program (code memory) and data, the architecture provides on-chip memory as well as off-chip memory expansion capabilities. The 8051 has three basic memory address spaces

• 64K-bytes of Program Memory
• 64K-bytes of External Data Program Memory
• 256-bytes of Internal Data Memory

Data Memory Address Space Memory Organization Of 8051

The data memory address space consists of an internal and an external memory space. Internal data memory is divided into the following three physically separate and distinct blocks > Lower 128 bytes of RAM > Upper 128 bytes of RAM (accessible in the 8032/8052 only) » 128-bytes of Special Function Register (SFR) area

• Lower 128 bytes of RAM -Upper 128 bytes of RAM(accessible in 8032/8052 only)

• 128 bytes of special function register (SFR) area.

  Lower 128 bytes of RAM address range is 00H to 7FH. How can manufacturer divided these 128 bytes as given in below table:

The upper RAM area and the SFR (Special Function Register) area share the same address locations.They are accessed through different addressing modes. Any location in the general-purpose RAM can be accessed freely using the direct or indirect addressing modes.

Register Bank in the 8051

Manufacturer allotted 32 bytes for Register Banks. These 32 bytes are divided into 4 banks of registers in which each bank has 8 registers, named as RO-R7.Each register it takes 1 byte. So, each bank occupies 8 bytes.

Bank 1 uses the same ram space as the stack. Register bank 0 is the default when the 8051 is powered up. We can switch to other banks by use of the PSW (Program status word) register. PSW is one of the SFR (Special Function Register) and also this one is bit addressable register. So, we can access bit addressable instructions SETB and CLR. In this register PSW.3 and PSW.4 bits are used to select the desired register bank as shown in below table.

If we are using CLR PSW.x instruction then it makes zero value in that particular bit, and if we are using SETB PSW.x instruction then one(1) value passes in that particular bit. Where ‘x’ represents either 3 (or) 4

Special Function Registers (SFRS) Memory Organization Of 8051

1) Special Function Registers (SFRs) are areas of memory that control specific functionality of the 8051 processor. SFRs are accessed as if they were normal Internal RAM. The only difference is that Internal RAM is from address 00H through 7FH whereas SFR registers exist in the address range of 80H through FFH. Each SFR has an address (80H through FFH) and a name.

2) SFRs related to the I/O ports. The 8051 has four I/O ports of 8 bits, for a total of 32 I/O lines. Whether a given I/O line is high or low and the value read from the line are controlled by these SFRs.

3)Total SFR memory is 128 bytes in that manufacturer allotted 21 bytes for 21 register Each and every register is used for some specific application. That’s why these registers called as a Special Function Registers.

4)In total 21 SFRs only 11 SFRs are Bit — Addressable SFRs and these SFRs also Byte Addressable SFRs

5)Total 21 SFRs are Byte Addressable Registers.

6)SFRs which in some way control the operation or the configuration of some aspect of the 8051.For example, TCON controls the timers, SCON controls the serial port. The remaining SFRs are that they don't directly configure the 8051 but obviously the 8051 cannot operate without them. For example, once the serial port has been configured using SCON, the program may read or write to the serial port using the SBUF register. In that 21 registers some of te-registers explanation as given in below.

PORT 0, PORT1, PORT2, PORT3 (BIT-ADDRESSABLE Registers)

PORT O is input/output port 0. Each bit of this SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 0 is pin PO0.0, bit’ 7 is pin PO.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level like PORT1(P1),PORT2(P2),PORT3(P3) also having same operation, addresses are different those are available in above table.

SP (STACK POINTER, ADDRESS 81H)

SP means Stack Pointer used to access the stack. This SFR indicates where the next value to be taken from the stack will be read from in Internal RAM. If we push a value onto the stack, the value will be written to the address of SP + 1. chat is to say, if SP holds the value 07H, a PUSH instruction will push the value onto the stack at address 08H. This SFR is modified by all instructions, which modify the stack, such as PUSH, POP, and LCALL, RET, RETI, and whenever interrupts are provoked by the micro controller.

DPL/DPH (DATA POINTER LOW/HIGH, ADDRESS 82H/83H)

The SFRs DPL and DPH work together to represent a 16-bit value called the Data Pointer. The data pointer is used in operations regarding external RAM and some instructions involving code memory. Since it is an unsigned two-byte integer value, it can represent values from 0000H to FFFFH (0 through 65,535 decimal).

PCON (POWER CONTROL, ADDRESS 87H)

The Power Control SFR is used to control the 8051's power control modes. Additionally, one of the bits in PCON is used to double the effective baud rate of the 8051's serial port.

TCON (TIMER CONTROL, ADDRESS 88H, BIT-ADDRESSABLE) of 8051

The Timer Contro] SFR is used to configure and modify the way in which the 8051's two timers operate. This SFR controls whether each of the two timers is running or stopped and contains a flag to indicate that each timer has overflowed. Additionally, some non-timer related bits are located in the TCON SFR. These bits are used to configure the way in which the external interrupts are activated and also contain the external interrupt flags which are set when an external interrupt has occurred.

TMOD (TIMER MODE, ADDRESS 89H)

The Timer Mode SER is used to configure the mode of operation of each of the two timers. Using this SFR your program may configure each timer to be a 16-bit timer, an 8-bit auto reload timer, a 13-bit timer, or two separate timers. Additionally, we may configure the timers to only count when an external pin is activated or to count "events" that are indicated on an external pin.

SCON (SERIAL CONTROL, ADDRESS 98H, BIT-ADDRESSABLE)

The Serial Control SFR is used to configure the behavior of the 8051's on-board serial port. This SFR controls the baud rate of the serial port, whether the serial port is activated to receive data, and also contains flags tiiat are set when a byte is successfully sent or received.

SBUF (SERIAL CONTROL, ADDRESS 99H)

The Serial Buffer SFR is used to send and receive data via the on-board serial port. Any value written to SBUF will be sent out the serial port's TXD pin. Likewise, any value that the 8051 receive via the serial port’s RXD pin, will be delivered to the user program via SBUF. In other words, SBUF serves as the output port when written to and as an input port when read from.

IE (INTERRUPT ENABLE, ADDRESS A8H)

The Interrupt Enable SFR is used to enable and disable specific interrupts. The lower 7 bits of the SFR are used to enable/disable the specific interrupts, where as the highest bit is used to enable or disable ALL interrupts. Thus, if the high bit of IE is 0 all interrupts are disabled regardless of whether_an individual interrupt is enabled by setting a lower bit.

IP (INTERRUPT PRIORITY, ADDRESSES B8H, BIT-ADDRESSABLE)

The Interrupt Priority SFR is used to specify the relative priority of each interrupt. On the 8051, an interrupt may either be of low (0) priority or high (1) priority.

PSW (PROGRAM STATUS WORD, ADDRESSES DOH, BIT-ADDRESSABLE)

The Program Status Word is used to store a number of important bits that are set and cleared by 8051 instructions. The PSW SFR contains the carry flag, the auxiliary carry flag, the overflow flag, and the parity flag. Additionally, the PSW register contains the register bank select flags, which are used to select, which of the "R" register banks are currently selected.

Comparison Between Microprocessor and Microcontrollers: