As the complexity of hardware increases, the number of chips present in board and interconnection among them may also increase. The device package in PCB becomes miniature to reduce total board space occupied by them and multiple layers of PCB are required to route the interconnection.

1. Miniaturisation becomes difficult to debug the hardware using magnifying glass, multimeter etc. to check the interconnection among various chips.
2. Boundary scan is a technique used for testing the interconnection among various chips which supports JTAG interface.
3. JTAG port contains 5 signal lines: TDI TDO TCK TRST TMS which together forms Test Access Port(TAP).
4. Each device will have its own TAP.
5. A boundary scan path is formed inside the board by interconnecting the device through JTAG signal lines.
6. The TDI pin of TAP of PCB is connected to the TDI pin of the first device. TDO pin of the first device is connected to the TDI pin of the second device. Same way, all devices are interconnected. TDo of the last JTAG device is connected to the TDO pin of TAP of PCB.
7. TCK and TMS line of the devices are connected to clock and test mode select line of TAP of PCB. This forms a boundary scan path.
8. The boundary scan cell is a multipurpose memory cell.
9. The boundary scan cell associated with the input pins of an IC are known as input cells.
10. The boundary scan cell associated with the output pins of an IC are known as output cells.
11. The boundary scan cells can be used to capture input pin signal state and pass to internal circuitry capturing the signals from the internal circuitry and passing it to the output pin and shifting the data received from TDI of TAP.
12. The boundary scan cells can be operated in Normal Capture Update Shift modes.
13. In normal mode, the input of the boundary scan cell appears directly at its output.
14. In capture mode, the boundary scan cell associated with each input pin of the chip captures the signal from respective pins to the cell and boundary scan cell associated with each output pin captures the signal from internal circuitry.
15. In the update mode, the boundary scan cell associated with each input pin of the chip passes the already captured data to the internal circuitry and the boundary scan cell associated with each output pin of the chip passes captured data to output pin.
16. In shift mode, data is shifted from TDI to TDO pin of the device through boundary scan cells.

17. ICs supporting boundary scan cell contain additional registers.

    $\to$ Instruction registers: Holds and processes the instructions received over TAP.

    $\to$ Bypass registers: Used for bypassing the boundary scan path of device and directly interconnecting TDI pin to TDO pin.

18. RUNBIST is the instruction used for performing self test on internal functioning of the chip.