Mumbai University > Computer Engineering > Sem 8 > Parallel & Distributed System

Process of execution of an instruction involves four major stages :

1] Instruction fetch (IF): Instruction by to be fetched from code area of main memory into the instruction register/buffer.

2] Instruction decode (ID) : The opcode from instruction buffer is decoded so as to identify the operation to be performed.

3] Operand fetch (OF) : The instruction to be operated in input data to be fetched from memory (data area).

4] Execution (EX) : Perform arithmetic \ logical or any specified operation on the operand and generate result.

4 stages of instruction execution.

In non pipelined mode, these 4 stages are performed sequentially one after other for each instruction.

In a 4 stage pipelined computer, successive stages are operated/executed in overlapped fashion.

Theoretically, K stage pipeline time is K - times faster than serial.

Speed up = $\frac{nk}{k + n - 1}$ (for $n \gt \gt$ k = K)

but this ideal speed up cannot be achieved due to factors like data dependency branch and interrupts.