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Derive equation for noise margins for CMOS invertor

Subject :- VLSI Design

Topic :- MOSFET Inverters

Difficulty - Medium

1 Answer
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To design Noise Margins

$NM_H$ = VOH – VIH

$NM_L$ = VIL – VOL

Step 1: Find VIL

$I_L$ = $I_D$

When Vin = VIL; nMOS is in saturation region and pMOS is in linear region

Differentiate w.r.t. Vin and substitute

Step 2: Find VIH

When Vin = VIH ; inverter is in D region and nMOS is in linear region and pMOS is in saturation region.

Differentiate w.r.t. Vin and substitute

Step 3: Find VOH

When Vin = 0 V; Vout = VOH i.e. Vgs,n < VT,n

nMOS is in cutoff region and pMOS is conducting i.e. it is in linear region.

Vout = VOH = VDD

Step 4: Find VOL

when Vin = VDD

nMOS is conducting and in linear region and pMOS is in cutoff region.

Therefore $I_L$ = $I_D$

Since $I_L$ = 0

Vout = VOL = 0V

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