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Difference between RISC and CISC
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written 6.0 years ago by |
RISC | CISC |
---|---|
Multiple register sets, often consisting of more than 256 registers | Single register set, typically 6 to 16 registers total |
Three register operands allowed per instruction (e.g add R1, R2, R3) | One or two register operands allowed per instructions (e.g add R1, R2) |
Parameter passing through efficient on-chip register windows | Parameter passing through inefficient off-chip memory |
Single-cycle instructions (except for load and store) | Multiple cycle instructions |
Hardwired control | Microprogrammed control |
Highly pipelined | Less pipelined |
Simple instructions that are few in number | Many complex instructions |
Fixed length instructions | Variable length instructions |
Complexity in compiler | Complexity in microcode |
Only load and store instructions can access memory | Many instructions can access memory |
Few addressing modes | Many addressing modes |