A Multigate device or multiple-gate field-effect transistor (MuGFET) refers to a MOSFET that incorporates more than one gate into a single device.

The multiple gates may be controlled by a single gate electrode, wherein the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes.

Multigate transistors are one of the several strategies being developed by CMOS semiconductor manufacturers to create ever-smaller microprocessors and memory cells, colloquially referred to as extending Moore's law.

Types of Multigate devices are as follows –

Double gate devices:

1.In double gate devices, both gates are connected together.

2.The electric field lines from source and drain, underneath the device terminate on bottom gate electrode and cannot therefore reach the channel region.

3.Only the field lines that propagate through the silicon itself can encroach the channel region and degrade short channel characteristics. This encroachment can be reduced by reducing the silicon film thickness.

4.The first fabricated double gate SOI MOSFET was the fully DEpleted Lean – channel TrAnsistor (DELTA, 1989) where the device is made in a tall and narrow structure silicon island called finger, leg or fin. Following figure shows DELTA mosfet structure.

5.The FinFET structure is similar to DELTA, except for the presence of a dielectric layer called the hard mask on top of the silicon fin. The hard mask is used to prevent the formation of parasitic inversion channel at the top corners of the device. Following figure shows FinFET structure.

6.Other example of double gate MOSFET includes gate all around device (GAA), Silicon on Noting (SON) mosfet, multi fin XMOS.

7.GAA is a planar mosfet with the gate electrode wrapped around channel region.

8.The MIGFET (Multiple Independent Gate FET) is a double gate device in which the two gate electrodes are not connected together and can, therefore, be biased with different potentials. The main feature of MIGFET is that the threshold voltage of one of the gates can be modulated by the bias applied to the other gate.

The triple-gate MOSFETs:

1.The triple-gate MOSFET is a thin film, narrow silicon island with a gate on three of its sides.

2.Implementations include the quantum wire SOI MOSFET and the trigate MOSFET.

3.The electrostatic integrity of triple-gate MOSFETs can be improved by extending the sidewall portions of the gate electrode to some depth in the buried oxide and underneath the channel region π-gate device and Ω-gate device from an electrostatic point of view, the π-gate device and Ω-gate MOSFETs have an effective number of gates between three and four.

4.The use of strained silicon, a metal gate and/or high-k dielectric as gate insulator can further enhance the current drive of the device.

Surrounding gates SOI mosfets:

i) Surrounding-gate MOSFET structure theoretically offers the best possible control of the channel region by the gate and hence the best possible electrostatic integrity.

ii) Such devices include CYNTHIA device (circular-section device) and the pillar surrounding-gate MOSFET (square-section device). More recently, planar surrounding-gate devices with square or circular cross sections have reported.

iii) Surrounding gates SOI MOSFETs with a gate length as small as 5 nm and a diameter of 3 nm have shown to be fully functional.

iv) Multiple surrounding-gate channels can be stacked on top of one another to increase the current drive per unit area, while sharing common gate, source and drain. Such devices are called the Multi-Bridge Channel MOSFET (MBCFET), the Twin-Silicon-Nanowire MOSFET (TSNWFET) or the Nano-Beam Stacked Channels (GAA) MOSFET.

Other Multigate FETs:

i) The inverted t-channel FET (ITFET) (figure a) combines a thin film planar SOI device with a trigate transistor. It comprises planar horizontal channels and vertical channels in a single device. The devices have multi-gate control around these channels.

ii) The inverted T-gate structure has several advantages: the large base helps the fins from falling over during processing; it also allows for transistor action in the space between the fins, which is left unused in other MuGFET configurations. These additional channels increase the current drive.

iii) The corners of the device turn on first, immediately followed by the surface of the planar regions and the vertical channel.

iv) Since each ITFET has about seven corner elements they constitute a significant current to each ITFET device and in a well-designed device can yield substantially more current than a planar device of equivalent area.

v) The Bulk FinFET (figure b) is a FinFET made on bulk silicon instead of an SOI wafer. Fins are etched on a bulk silicon wafer and trimmed using an oxidation step. Field oxide is deposited to avoid inversion between the fins. Device with fin width down to 10 nm have shown to have good punch-through immunity down to the sub-20 nm gate length regime.

vi) The Multi-channel FET (McFET) (figure c) is a modified bulk FinFET where a trench is etched in the center of the fin. The trench is filled by the growth of a gate oxide and the deposition of gate material.