written 6.2 years ago by | • modified 6.2 years ago |
It has a 32 bit register, of which 13 are general purpose registers (r0-r12), SP (r13), link register (r14), program counter (r15), program status register (xPSR).
i) SP- stack pointer - There are two stack pointers. They are banked only one is visible at a time.
- MSP- main stack pointer: It is a default stack pointer.
- PSP- process stack pointer: It is used by user application code.
ii) LR- link register - When a subroutine is called, the return address is stored in link register.
iii) PC- program counter - It stores the current program address.
Special Registers of Cortex M3 -
a) xPSR- Program Status Register : It has three different categories, Application PSR, Interrupt PSR and Execution PSR.
- APSR- Application Program Status Register: contains condition flags
- IPSR- Interrupt Program Status Register: contains ISR number of current process
- EPSR- Execution Program Status Register: for execution.
b) Interrupt mask registers:
PRIMASK- disables all interrupts except NMI and hard faults.
FAULT MASK- disables all interrupt except NMI
BASEPRI- disables all interrupts of specific priority or low priority.
c) Control registers:
- CONTROL- defines privilege status and SP selection.