written 6.7 years ago by | • modified 6.5 years ago |
Subject :- VLSI Design
Topic :- Semiconductor Memories
Difficulty :- Medium
written 6.7 years ago by | • modified 6.5 years ago |
Subject :- VLSI Design
Topic :- Semiconductor Memories
Difficulty :- Medium
written 6.6 years ago by | • modified 6.6 years ago |
Motivation for Scaling
The reduction of the dimensions of a MOSFET has been dramatic during the last three decades.
Starting at a minimum feature length of 10 mm in 1970 the gate length was gradually reduced to 0.15 mm minimum feature size in 2000, resulting in a 13% reduction per year.
Proper scaling of MOSFET however requires not only a size reduction of the gate length and width but also requires a reduction of all other dimensions including the gate/source and gate/drain alignment, the oxide thickness and the depletion layer widths.
Scaling of the depletion layer widths also implies scaling of the substrate doping density.