written 6.7 years ago by | • modified 6.5 years ago |
Subject :- VLSI Design
Topic :- Semiconductor Memories
Difficulty :- High
written 6.7 years ago by | • modified 6.5 years ago |
Subject :- VLSI Design
Topic :- Semiconductor Memories
Difficulty :- High
written 6.6 years ago by | • modified 6.6 years ago |
Components of Power Dissipation Unlike bipolar technologies, here a majority of power dissipation is static, the bulk of power dissipation in properly designed CMOS circuits is the dynamic charging and discharging of capacitances. Thus, a majority of the low power design methodology is dedicated to reducing this predominant factor of power dissipation.
There are three main sources of power dissipation:
• Static power dissipation (PS)
• Dynamic power dissipation (DS)
• Short circuit power dissipation (PSC) Thus the total power dissipation, PD , is $P_D=P_S+P_D+P_{SC}$
Static Power Dissipation Consider the complementary CMOS gate, shown in fig.
Fig : CMOS inveter model for static power dissipation evaluation
When input = '0', the associated n-device is off and the p-device is on. The output voltage is or logic '1'. When the input = '1', the associated n-device is on and the p-device turns off. The output voltage is '0' volts or . It can be seen that one of the transistors is always off when the gate is in either of these logic states. Since no current flows into the gate terminal, and there is no DC current path from to , the resultant quiescent (steady-state) current, and hence power , is zero.
However, there is some small static dissipation due to reverse bias leakage between diffusion regions and the substrate. In addition, subthreshold conduction can contribute to the static dissipation. A simple model that describes the parasitic diodes for a CMOS inverter should be looked at in order to have an understanding of the leakage involved in the device.
The source-drain diffusions and the n-well diffusion form parasitic diodes. In the model, a parasitic diode exists between n-well and the substrate. Since parasitic diodes are reverse biased, only their leakage current contributes to static power dissipation. The leakage current is described by the diode equation:
$i_0=i_s(e^{\frac{qV}{kT}}-1)$
where,
is= reverse saturation current
V = diode voltage
q = electronic charge
k = Boltzmann's constant
T = temperature
The static power dissipation is the product of the device leakage current and the supply voltage:
$P_s=i_{leakage}*V_{DD}$