Subject :- VLSI Design

Topic :- Data Path Design

Difficulty :- High

$C^2MOS\,\, Logic \,\,Style$

The logic is implemented in both n- and p- transistors in the form of a pull up p- block and a complementary n-block pull down structure. However the logic in this case is evaluated only during the on period of the clock

Clocked CMOS circuits with …