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Explain 8086-8087 coprocessor configuration in maximum mode of operation
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8086/8088-BASED MULTIPROCESSING SYSTEMS

  • Multiprocessor Systems refer to the use of multiple processors that execute instructions simultaneously and communicate using mailboxes and semaphores
  • Maximum mode of 8086 is designed to implement3basic multiprocessor configurations:
  • coprocessor (8087)
  • closely coupled (dedeicated I/O processor:8089)
  • loosely coupled (Multibus)
  • Coprocessors and closely coupled configurations are similar-both the CPU and the external processor share:
    • Memory
    • I/O system
    • Bus&bus control logic
    • Clock generator

Coprocessor Configuration

  • WAIT instruction=allows the processor to synchronize itself with external hardware, eg., waiting for 8087 math co-processor.
  • When the CPU executes WAIT=waiting state.
  • TEST input is asserted (low), the waiting state is completed and axecution will resume.

  • ESC instruction: ESC opcode, operand opcode:immediate value recognizable toacoprocessor as an instruction opcode operand: name ofaregister oramemory address (in any mode)

  • When the CPU executes the ESC instruction, the processor accesses the memory operand by placing the address on the address bus.
  • If a coprocessor is configured to share the system bus, it will recognize the ESC instruction and therefore will get the opcode and the operand.

Control Unit

  • Control unit. To synchronize the operation of the coprocessor and the processer.
  • This unit has a Control word and Status word and Data Buffer
  • If instruction is an ESCape (coprocessor) instruction, the coprocessor executes it, if not the microprocessor executes.

Numeric Execution Unit

  • This performs all operations that access and manipulate the numeric data in the coprocessor's registers.
  • Numeric registers in NUE are 80 bits wide.
  • NUE is able to perform arithmetic, logical and transcendental operations as well as supplyasmall number of mathematical constants from its on-chip ROM.
  • Numeric data is routed into two parts ways a64 bit mantissa bus and a16 bit sign/exponent bus.
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