written 6.9 years ago by | modified 2.8 years ago by |
Subject: Digital System Design
Topic: Programmable Logic Devices
Difficulty: Medium
written 6.9 years ago by | modified 2.8 years ago by |
Subject: Digital System Design
Topic: Programmable Logic Devices
Difficulty: Medium
written 6.6 years ago by |
In digital system, comparison of two numbers is an arithmetic operation that determines if one number is greater than, equal to, or less than the other number. So comparator is used for this purpose.
Magnitude comparator is a combinational circuit that compares two numbers, A and B, and determines their relative magnitudes. The outcome of comparison is specified by three binary variables that indicate whether A>B, A=B, or A
A 2-Bit Magnitude Comparator Compares two numbers each having two bits (A1, A0 & B1, B0).
Truth Table of 2-Bit Magnitude Comparator:
Karnaugh Mapping: K-Map is used to minimize Boolean function obtained from truth table
Logic Diagram: According to logic function obtained from truth table, logic diagram is drawn as