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Explain complete frequency response of CS amplifier.

Mumbai University > Electronics Engineering > Sem 4 > Discrete Electronic Circuits

Marks: 10M

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Figure 1 shows the circuit diagram of CS amplifier and Figure 2 shows the frequency response. Let us divide frequency response into three different regions:

  • Low frequency region
  • Mid frequency region
  • High frequency region

Low frequency region :

The voltage gain of the amplifier decreases at low frequency. The decrease in gain is due to connected capacitance i.e. Cg, Cc, and Cs.

Let us consider effect of Cg with $Cc=Cs=\infty$, hence ac equivalent becomes,

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At mid frequency Cg act as short circuit,

$V_{gs}=\frac{Vs \times Rg}{Rg+Rsig}$ (1)

At low frequency Xcg is very large,

$Vgs=\frac{Vs \times Rg}{\sqrt(Rg+Rsig)^2+Xcg^2}$

Put Xcg = Rg+Rsig

$Vgs=\frac{Vs \times Rg}{\sqrt 2(Rg=Rsig)}$

$Vgs=70.7\%\frac{Vs \times Rg}{Rg+Rsig}(2)$

From (1) and (2),

Vgs at L.F = 70.7% of Vgs at M.F

Vo at L.F = 70.7% of Vo at M.F

Divide by Vin,

Av at L.F = 70.7% of Av at M.F

Above equation is true only if Xcg = Rg+Rsig.

As seen from above analysis gain decrease at low frequency due to connected capacitor.

Mid frequency region :

At mid frequency connected capacitor Cg, Cc, Cs acts as short circuit and junction as well as wiring capacitor acts as a open circuit. Hence gain of the amplifier is maximum and constant in this region. Therefore, increasing the input voltage, output voltage also increases.

High frequency region :

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At high frequency voltage gain decreases due to junction and wiring capacitance. Effect of Cgd can be shown on input side as well as output side by using miller effect.

$C_{M1} = Cgd( 1 - Av ) ….(i/p side)$

$C_{M2} = Cgd( 1 - 1/Av ) …(o/p side)$

The capacitance at the input side are parallel i.e. Cgs ,Cwi and $C_{M1}$ which are combined to form single equivalent capacitance Cin,

$Cin = Cgs + Cwi + C_{M1}$

Similarly, capacitance at the output side,

$Cout = Cds+ Cwo+ C_{M2}$

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As $XCout = 1/2 \pi f Cout,$ at high frequency XCout is comparable with Rd||RL. In such case drain current will pass through XCout and Rd||RL .

As input frequency increases XCout becomes lesser than Rd||RL. Hence more current passes through XCout which decreases output voltage and voltage gain.

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