Microprocessor - Dec 2014

Computer Engg (Semester 4)

TOTAL MARKS: 100
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any four from the remaining questions.
(3) Assume data wherever required.
(4) Figures to the right indicate full marks.

Answer any one question from Q1 and Q2

1 (a) Draw and explain programmer's model of 80386.(4 marks) 1 (b) Differentiate between FAR and NEAR procedure.(4 marks) 1 (c) Explain the concept of DOS loading.(4 marks) 2 (a) What do you mean by Interrupt vector table?(4 marks) 2 (b) What should be the OCWI if interrupt inputs IRO through IR3 are to be disable and IR4 through IR7 enabled?(4 marks) 2 (c) What is the significance of the following pins of 8086:
i) READY
ii) LOCK
iii) TEST
iv) NML(4 marks)

Answer any one question from Q3 and Q4

3 (a) Draw the block diagram of 8251 and state the functions of:
i) Transmitter <bt> ii) Receiver.</bt>(4 marks) 3 (b) Draw an interfacing diagram of 4×4 keyboard with 8255 PPI using Port A.(4 marks) 3 (c) Explain the following signals for interfacing DMA controller:
i) HOLD
ii) HLDA
iii) HRQ
iv) DACK(4 marks) 4 (a) Prepare a control word to initialize 8279 in the following given keyboard / display mode:
i) 16, 8-bit character left entry
ii) Decoded scan n-key rollover.(4 marks) 4 (b) List the different mode of operations of 8253 and explain the rate generator mode with the help of timing diagram.(4 marks) 4 (c) Explain the following MODEM control signals of 8251:
i) DSR
ii) DTR
iii) CTS
iv) RTS.(4 marks)

Answer any one question from Q5 and Q6

5 (a) Draw and explain block diagram of 8087.(7 marks) 5 (b) Write notes on the following supporting chips:
i) 8284
ii) 8286
iii) 8288(6 marks) 6 (a) Draw and explain the write timing diagram of 8086 maximum mode.(7 marks) 6 (b) What is the significance of the following pins of 8087:
i) RQ/GT₀
ii) QS₀/QS₁
iii) BUSY.(6 marks)

Answer any one question from Q7 and Q8

7 (a) Explain block diagram of intel i5 processor with the help of diagram.(7 marks) 7 (b) Explain the following terminologies:
i) Hyper-threading technology
ii) Turbo memory
iii) Matrix storage technology.(6 marks) 8 (a) Draw and explain block diagram of x58 chipset.(7 marks) 8 (b) Explain the following Intel^(R) 82801 IJR I/O controller hub capabilities:
i) Direct Media Interface
ii) PCI Express* Interface
iii) Serial ATA (SATA) Controller.(6 marks)