Figure 1 : CS JFET Amplifier

Figure 2 : High frequency equivalent circuit

• Figure 1 shows the implementation of CS amplifier and Figure 2 shows the high frequency equivalent circuit. At high frequency gain decreases due to stray and wiring capacitance. The coupling capacitors and bypass capacitor are act as a short circuit for high frequencies.
• Since rds is very large than Rd||RL, hence neglecting rds.
• Miller theorem may be used to replace the series capacitance Cgd with the capacitance seen in the input and output side as follow :

$C_M1$ = Cgd ( 1 - $A_V$ ) ….(i/p side)

$C_M2$ = Cgd ( 1 - $\frac{1}{A_V}$ ) …(o/p side)

• The capacitance at the input side are parallel i.e. Cgs, Cwi and $C_M1$ which are combined to form single equivalent capacitance Cin,

Cin = Cgs + $C_M1$ + Cwi

• Similarly, capacitance at the output side,

Cout = Cds + $C_M2$ + Cwo

Figure 3 : Simplified high frequency equivalent circuit of CS amplifier

• As XCout = $\frac{1}{2*\pi*fCout}$, at high frequency XCout is comparable with Rd||RL. In such case drain current will pass through XCout and Rd||RL .

• As input frequency increases XCout becomes lesser than Rd||RL. Hence more current passes through XCout which decreases output voltage and voltage gain.