Mumbai University > Electronics Engineering > Sem 4 > Discrete Electronic Circuits

Marks: 5M

Year: Dec 2015

• FET operates either in ohmic region or pinch off region. So in order to operate FET in these regions we need to bias FET which is nothing but use of resistors and supply connected in such a way that voltage gets appeared across gate and source as well as drain and source.

• Biasing gives Q point which gives dc drain to source current (IDSQ) and drain to source voltage (VDSQ). This Q-point should be stable against device parameters variations and temperature drift.

• The different biasing methods used for common source configuration are as follows ;

1) Fixed Bias Configuration

2) Self Bias Configuration

3) Voltage Divider Configuration

1) Self Bias Configuration :

Figure 1: Self Bias Configuration

The self bias eliminates the need of two dc power supplies. The controlling gate to source voltage is determined by the voltage across $R_S$ as shown in Figure 1. For dc analysis all the capacitors are replaced by open circuit. The drain to source current (IDS) is developed across $R_S$. The gate current is due to minority charge carriers which is approximately equal to zero, hence voltage drop across $R_G$ is zero which is replaced by short circuit since $I_G$=0A. Due to this voltage across $R_S$ gets appeared across gate and source hence biasing is known as Self Bias.

The current through $R_S$ is the source current $I_S$, but $I_S$ = $I_D$,

VRS = $I_D$ $R_S$

-VGS -VRS=0

VGS = -VRS

VGS = -$I_D$ $R_S$

This is known as self bias line equation.