Microprocessor & Interfacing - Jun 2014

Computer Engineering (Semester 5)

TOTAL MARKS: 100
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any four from the remaining questions.
(3) Assume data wherever required.
(4) Figures to the right indicate full marks. 1 (a) (i) What are the steps taken by 8086 when interrupt comes?(3 marks) 1 (a) (ii) How does 8086 architecture make the instruction fetching and instruction execution independent using prefetch queue? Explain.(4 marks) 1 (b) Explain the addressing modes of 8086 with example.(7 marks) 2 (a) Draw and explain 8086 pin diagram.(7 marks) 2 (b) Explain 8086 interrupt vector table.(7 marks) 2 (c) Draw and explain 8086 internal block diagram.(7 marks) 3 (a) List and explain the various Bit Manipulation and String instructions with Examples.(7 marks) 3 (b) Describe MMX and Hyper Threading.(7 marks) 3 (c) Differentiate between CISC and RISC.(7 marks) 3 (d) Discuss Minimum mode operation of 8086.(7 marks) 4 (a) List three major advances that the 80386 microprocessor has over the 80286. Draw and explain how a 32-bit virtual address for a data segment location in a task?s local memory is translated to the actual 32-bit physical address for a 386 operating in segments only protected mode.(7 marks) 4 (b) Draw a flow chart or write the pseudo-code and then write an 8086 assembly language program for adding a constant to a series of values in memory.(7 marks) 4 (c) Draw and explain pin diagram of 80286 microprocessor. Also explain 80286 protected-mode operation.(7 marks) 4 (d) Draw a flow chart or write the pseudo-code and then write an 8086 assembly language program for finding the average of any number of bytes in an array in memory. The number of bytes to be added is in the first byte of the array.(7 marks) 5 (a) Draw and explain Intel 486 internal block diagram.(7 marks) 5 (b) What is macro? How can you define and call macros? Give an example of macro with parameter.(7 marks) 5 (c) Describe Re-entrant and Recursive procedures.(7 marks) 5 (d) Explain the architecture of SUN SPARC processor.(7 marks)