written 8.2 years ago by | • modified 8.2 years ago |
Mumbai University > Electronics ana telecommunication engineering > Sem 3 > Analog electronics 1
Marks: 10M
Years: Dec 14
written 8.2 years ago by | • modified 8.2 years ago |
Mumbai University > Electronics ana telecommunication engineering > Sem 3 > Analog electronics 1
Marks: 10M
Years: Dec 14
written 8.2 years ago by | • modified 8.2 years ago |
Biasing of Enhancement MOSFET:
Figure 2.11 shows the drain-to-gate bias circuit for enhancement mode MOSFET. Here, the gate bias voltage is VGS=[R1(R(1)+Rf)]VDS. This circuit offers the d.c. stabilization through the feedback resistor R_f. However, the input resistance is reduced because of Miller effect.
Also, the voltage divider biasing technique given for JFET can be used for the enhancement MOSFET. Here, the d.c. stability is accomplished by the d.c. feedback through RS.
But the self-bias technique given for JFET cannot be used for establishing an operating point for the enhancement MOSFET. Figure 2.12 shows an N-channel enhancement mode MOSFET common source circuit with source resistor. The gate voltage is
VG=VGS=[R1(R(1)+R2)]VDS
And the gate to source voltage is VGS=VDD−VG
Assuming that VGS>VTN and the MOSFET is biased in the saturation region, the drain current is
ID=KN(VGS−VTN)2
Here the threshold voltageVTN and the conduction parameter KN are functions of temperature.
The drain to source voltage is
VDS= VDD−IDRD
If VDS>VDS(sat) = VGS−VTN then the MOSFET is biased in the saturation region. VDS<VDS(sat)= VGS - VTN then the MOSFET is biased in the non-saturation region, and the drain current is given by,
ID=KN[2(VGS−VTN)VDS−DDS2]
The transfer characteristics of the enhancement type MOSFET are completely different from that of a JFET.
The most important difference between the two is that for the n-channel enhancement type MOSFET, drain current ID = 0 for VGS<VGS(th)as shown in Fig. 2.13.
For VGS<VGS(th) the relation between IDandVGS is defined as follows:
ID=KN(VGS−VTN)2 ….. (1)
As VGS is sometimes denoted by VT.
Plotting the transfer characteristics:
The first point plotted is point "A" where VGS = V(GS(th)) and ID = 0.
The second point which can be easily plotted is point "B" which corresponds toV_GS = V(GS(on)) and ID = I(D(on)).
To plot the remaining points we will have to obtain the value of conduction parameter "k" as follows:
ID=k[VGS−VGS(Th)]2
ID(ON)=k[VGS(ON)−VGS(Th)]2
k =ID(ON)[VGS(ON)−VGS(Th)]2=ID(ON)[VGS(ON)−VT]2------ (2)
Once the value of "k" is obtained from above Equation (2), we can substitute different values of V_GS in Equation and obtain the corresponding values of I_D, to plot the remaining points of characteristics.
Biasing of Depletion MOSFET:
Both the self-bias technique and voltage divider bias circuit given for JFET can be used to establish an operating point for the depletion mode MOSFET.