The diagram below

DC analysis of the circuit:

1.$V_G = \frac{R_2}{(R_1+ R_2 )} (V_DD-V_SS) – 5V= \frac{30}{(180 + 30)}X 10 – 5 = -3.571V$

Applying KVL to gate source loop we get,

1. $V_G- V_GS- I_DQ R_S+5 = 0$

∴$V_GSQ= 5+V_G- I_DQ R_S = 5 -3.571 – 1000 I_DQ = 1.429 –1000 I_DQ$

1. But $I_DQ = K (V_GSQ- V_T)^2$

   $I_DQ = 1 X 10^(-3) (1.429 – 1000 I_DQ - 0.8)^2$

   $I_DQ = 1 X 10^(-3) (0.629-1000 I_DQ)^2$

   $I_DQ = 1 X 10^(-3) (0.395 - 1258 I_DQ+10^6 I_DQ^2)$

   $I_DQ = 3.95 X 10^(-4) - 1.258 I_DQ+10^3 I_DQ^2$

By solving quadratic equation,

$I_DQ = 2.066 X 10^(-3) A$ or $I_DQ = 0.1911 X 10^(-3) A$

If we select $I_DQ = 2.066 X 10^(-3) then V_DSQ$ will be negative.

So $I_DQ$ = 0.1911 mA

$I_DQ$ = 0.1911 mA

1. $V_GSQ$= 1.429 – 1000X 0.1911 X 10^(-3) = 1.2379 V

2. $g_m= 2K(V_GSQ - V_T)$

= $2 X 1 X 10^(-3) (1.2379 – 0.8) = 8.758 X 10^(-4)$ = 0.8758 mA/V

AC analysis:

Step1: Draw the small signal equivalent circuit The small signal equivalent circuit is shown in fig.

Step2: Calculate the voltage gain

$V_o = -g_m V_gs R_D$

And $V_i = V_gs + g_m V_gs R_S = = V_gs (1+g_m R_S)$

$A_V = \frac{V_o}{V_i} = \frac{(-g_m V_gs R_D)}{(V_gs (1+g_m R_S))}$

=$\frac{(-g_m R_D)}{( (1+g_m R_S))}= \frac{(-0.8758 X 6.3)}{(1+0.8758 X 1)}$ = -2.941V

$A_V$ = -2.941V

Step2: Input Resistance:

$R_i = (R_1 ||R_2)$

= 180K || 30K = 25.714 Ω

$R_i$ = 25.714 Ω

Step3: Input Resistance:

Apply KCL at node D of fig.

$I_o = g_m V_GS + I_RD$

Apply KVL to DSG loop of fig to write,

$V_o +g_m V_GS -g_m V_GS R_S = 0$

∴$g_m V_GS = \frac{V_o}{(R_S-1)}$

$I_RD= \frac{V_o}{R_D}$

$I_o =\frac{V_o}{(R_S-1)}+ \frac{V_o}{R_D} But R_S-1= R_S$

∴ $I_o =V_o (\frac{1}{R_S} + \frac{1}{R_D} )$

$R_o = \frac{V_o}{ I_o} = \frac{R_(S X R_D )}{R_(S+ R_D )}$ = R_S ||R_D = 6.3K || 1K = 863.013 Ω

$R_o$ = 863.013Ω