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Draw and explain port 0 and port 3 of 8051.
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written 7.8 years ago by | • modified 7.8 years ago |
Port 0:
- Port 0 can be used as a normal bidirectional I/O port or it can be used for address/ data interfacing for accessing external memory when control ‘1’ the port is used for address/data interfacing, when the control is ‘0’ the port can be used as a bidirectional I/O port 0.
Port o as an Input Port:
- Assume that control is ‘o’ when the port is used as an input port ‘1’ is written to the latc, in this situation both the output FET are off, hence the output pin have floats hence whatever, data written on pin is directly read by read pin
Port o as an output port:
- To write ‘1’ on pin of port o a ‘1’ written to the latch which turns off the lower FET while due to ‘0’ control signal upper FET also turns off, here we want logic ‘1’ on pin but we getting floating value so to convert that floating value so to convert that floating value into logic ‘1’ to connect the pull up resistor parallel to upper FET
PIN | SYMBOL | SFR | SIGINIFICANCE | - |
---|---|---|---|---|
P3.0 | RXD | SBUF | It is the received data pin for serial | Port in,UART Mode |
P3.1 | TXD | SBUF | It is the transmit data pin foe serial | Serial port in UART mode |
P3.2 | $\overline{INT0}$ | TCON.1 | It is an external interrupt | It is low level or falling edge rigerred |
P3.3 | $\overline{INT1}$ | TCON.3 | It is an external interrupt | It is low level or falling edge rigerred |
P3.4 | T 0 | T < 0 | External timer / counter 0 | Input pin gives pulse to T<0 register of the timer 0 to increase N by 1 |
P3.5 | T 1 | T < 1 | External timer / counter 1 | Input pin gives pulse to T<1 register of the timer 0 to increase by 1 |
P3.6 | $\overline{wR}$ | - | It is an external memory writer | Pulse it is an active low pulse |
P3.7 | $\overline{RD}$ | - | It is an external memory reader | Pulse whenever data from memory is read |
Port 3:
Port 3 is multifunction part it can be used as a simple input/output port.
Port 3 as simple input port:
When port 3 is used as an input port ‘1’ must be written to the corresponding port 3 latch bit this cause the FET to turn off pin & input to pin buffer are pulled to logic high by internal pull up load.
Port 3 as simple output port:
when port 3 is used as an output the latch pins that are programmed to o cause the lower FET to turn on the internal pull up turn off & input to the circuit is logic 0 if a ‘1’ is written onto the latch pin then it drive the input of external circuit high through the pull up, lower FET turns off.
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