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Implement the following Boolean equation using single 4:1 MUX and few logic gates:

Mumbai University > Electronics and Telecommunication Engineering > Sem 3 > Digital Electronics

Marks: 10M

Year: May 2016

F (P, Q, R, S) = ∑M (0, 2, 5, 6, 7, 9, 12, 15)

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Fig1 shows the implementation of function using 4:1 multiplexer. Here, three of the variables, B and C are applied to the selection lines. C is connected to the S0 and B is connected to S1. The inputs to the multiplexer are derived from the implementation table.

Step1: Implementation table

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D0=A̅B̅+AB=(AB)

D1=A̅B+AB̅=AB

D2=A̅B̅+A̅B=A̅((B)̅+B)=A̅

D3=A̅B+AB=((A)̅+A)B=B

Step2: Multiplexer implementation

enter image description here

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