Analog Electronics - 1 - Dec 2014

Electronics & Telecomm. (Semester 3)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks.

Attempt any five:

1 (a) The PNP transistor shown in Fig a has ?=50. Find the value of Rc to obtain Vc=+5V. What happens if transistor is replaced with another having ?=100. (5 marks) 1 (b) Draw small signal model of JFET and explain significance of each parameter.(5 marks) 1 (c) Why common collector amplifier is used as buffer. Why buffers are required.(5 marks) 1 (d) Write down current equation of diode and explain significance of each parameters.(5 marks) 1 (e) For the circuit shown in Fig le. Find I_DS and V_DS if V_RS=1.5V. (5 marks) 1 (f) Compare Collpit's and Clapp's oscillator.(5 marks) 2 (a) Explain working of n-channel eMOSFET with the help output characteristics, showing clearly effect of channel length modulation. Give equation of drain current in linear and saturation current along with conditions.(10 marks) 2 (b) Design JFET circuit with voltage divider biasing as shown in Fig 2b with JFET parameters I_DSS=12mA, V_F=3.5V and ?=0. Let R₁+R₂=100K, I_DSQ=5mA. And V_DSQ=5V. (10 marks) 3 (a) Draw circuit diagram of common emitter amplifier with voltage divider bias with bypassed emitter resistance and derive expression for voltage gain, current gain, input resistance, output resistance using hybrid-?- model which includes early effect.(10 marks) 3 (b) In n-channel E-MOSFET
i) Substrate doping N_A=10¹⁶ cm^-3.
ii) Poly=silicon Gae doping N_D=10²⁰cm^-3
iii) Gate oxide thickness tox=0.5 ?m
iv) Oxide positive charge interface density=4&time;10¹⁰ cm^-2
v) Charge of electron=1.6×10^-19 col
vi) Permittivity of free space &insin;₀=8.85&time;10^-14 F/cm.
vii) Dielectric constant of Si=11.9

viii) Dielectric constant of Si0₂=3.9
Find zero bias threshold voltage (V_TO)(10 marks) 4 (a) Explain the working of Wien-Bridge Oscillator. Derive the expression for frequency of Oscillation and the value of gain required for sustained oscillation.(10 marks) 4 (b) For the circuit shown i Fig 4b, assume ?=100. i) Find Thevenin's equivalent voltage V_TH and resistance R_TH for base circuit ii) Determine I_CQ and V_CEQ (10 marks) 5 (a) Draw a required diode clamper circuit to generate the output V_D to from the input V_t as shown in Fig 5a if ii) V?=0.7V. Where V? is cut-in voltage of diode. (10 marks) 5 (b) What are different biasing techniques used to bias D-MOSFET and E-MOSFET. Explain with the help of appropriate circuit diagrams.(10 marks) 6 (a) Hybrid-? model of BJT(5 marks) 6 (b) Twin-T oscillator(5 marks) 6 (c) AC and DC load line(5 marks) 6 (d) MOS capacitor.(5 marks)