Mumbai University > Electronics Engineering > Sem 7 > Embedded System Design

Marks: 5 Marks

Year: Dec 2015

Interrupts:

1. An interrupt is a hardware mechanism used to inform the CPU that an asynchronous event has occurred.
2. When an interrupt is recognized, the CPU saves part (or all) of its context (i.e., registers) and jumps to a special subroutine, called an interrupt service routine (ISR).

3. The ISR processes the event, and, upon completion of the ISR, the program returns to:

   a. The background for a foreground/background system,

   b. The interrupted task for a non-preemptive kernel, or

   c. The highest priority task ready to run for a preemptive kernel.

4. Interrupts allow a microprocessor to process events when they occur, which prevents the microprocessor from continuously polling (looking at) an event to see if it has occurred. Microprocessors allow interrupts to be ignored and recognized through the use of two special instructions: disable interrupts and enable interrupts, respectively.

5. In a real-time environment, interrupts should be disabled as little as possible. Disabling interrupts affects interrupt latency and can cause interrupts to be missed. Processors generally allow interrupts to be nested, which means that while servicing an interrupt, the processor recognizes and services other (more important) interrupts.

Factors contributing to interrupt response:

Interrupt response is defined as the time between the reception of the interrupt and the start of the ISR that handles the interrupt. The interrupt response time accounts for all of the overhead involved in handling an interrupt. Typically, the processor’s context (CPU registers) is saved on the stack before the ISR is executed.

1. For a foreground/background system, the user ISR code is executed immediately after saving the processor’s context. The response time is given by Equation: Interrupt response time = Interrupt latency + Time to save the CPU’s context
2. For a non-preemptive kernel, the user ISR code is executed immediately after the processor’s context is saved. The response time to an interrupt for a non-preemptive kernel is given by Equation: Interrupt response time = Interrupt latency + Time to save the CPU’s context
3. For a preemptive kernel, a special function provided by the kernel needs to be called to notify the kernel that an ISR is starting. This function allows the kernel to keep track of interrupt nesting. The response time to an interrupt for a preemptive kernel is given by Equation

Interrupt response time = Interrupt latency+ Time to save the CPU’s context + Execution time of the kernel ISR entry function

Interrupt latency is a factor found to be common in all the types of systems for increasing the interrupt response time.

Interrupt latency is dependent on the amount of time; the kernel disables the interrupt and is given by the equation:

Interrupt latency = Maximum amount of time interrupts are disabled + Time to start executing the first instruction in the ISR