Integrated Circuits - May 2014

Electronics & Telecomm. (Semester 5)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks. 1 (a) Draw the block diagram of an OP-AMP and explain the function of each block(5 marks) 1 (b) Explain log amplifier(5 marks) 1 (c) Explain how switch debouncing is avoided using flip-flop(5 marks) 1 (d) Give the features of function generator IC 2206(5 marks) 2 (a) Explain basic requirement of instrumentation amplifier and find output voltage expression for instrument amplifier using three OP-amp(10 marks) 2 (b) Write VHDL code for 4 bit down counter(10 marks) 3 (a) Design a second order KRC highpass filter with cut-off frequency FO=1 kHZ and Q=5 and draw circuit diagram(10 marks) 3 (b) For 5 bit, R-2R ladder network with O=0 V1=10V, find:-
(i) Analog output due to LSB change
(ii) Full scale output voltage
(iii) Analog output for digital input 11000.(10 marks) 4 (a) Explain in detail various documentation standard of sequential circuits. Draw the internal structure of synchronous SRAM(10 marks) 4 (b) Explain diagram of IC 8038 with internal block. Find expression for duty cycle of 8038 IC(10 marks) 5 (a) Draw the block diagram of IC 565 PLL. Explain in detail FSK demodulation using PLL(10 marks) 5 (b) Draw the block diagram of internal architecture of IC XC 9500 family CPLD and explain(10 marks) 6 (a) Design astable multivibrator using 555 with output frequency 10 KHz and duty cycle 70%(10 marks) 6 (b) Explain the operationof the sample and hold circuit. Draw inputand output waveforms.(10 marks)

Write short note on :-

7 (a) Non-inverting Schmitt trigger(5 marks) 7 (b) Explain FPGA(5 marks) 7 (c) Differentiate between Moore and Melay circuit(5 marks) 7 (d) Comparator Circuit(5 marks)