Analog Electronics 2 - May 2012

Electronics & Telecomm. (Semester 4)

TOTAL MARKS: 80
TOTAL TIME: 3 HOURS (1) Question 1 is compulsory.
(2) Attempt any three from the remaining questions.
(3) Assume data if required.
(4) Figures to the right indicate full marks.

Give reasons for the following:-

1 (a) When JFET is biased in constant current region the gate source junction capacitor has a higher value compared to gate drain junction capacitor.(5 marks) 1 (b) In case of transistorised oscillator circuit the transistor used is generally connected in common emitter mode only.(5 marks) 1 (c) In transistorised Monostable and Bistable Multivibrator negative edge triggering is perferred over positive edge triggering.(5 marks) 1 (d) Small signal voltage amplifiers don't face a problem of harmonic distortion whereas power amplifiers suffer from harmonic distortion.(5 marks) 2 (a) Design a RC coupled CS amplifier using JFET BFW11 to meet following specifications -
A_v ≥ 100, V_o/p = 2.5V, I_DSQ = 1.38mA, F_L ≤ 25Hz
Neglect r_d for designing. Find maximum peak to peak value that the designed circuit can provide.(15 marks) 2 (b) For the above designed circuit if C_gd = 0.1 pf, C_gs = 1 pf. What will be the higher cut-off frequency?(5 marks) 3 (a) For the given circuit, find the DC operating point Q₁ and Q₂, mid frequency voltage and current gain input and output impedance.

Explain importance of Cascode amplifier.(10 marks) 3 (b) Draw a near circuit diagram of a transistorised Schmitt trigger circuit. Explain its working with proper waverforms. Explain the need of speed up capacitor.(10 marks) 4 (a) For the following circuit identify the type of negative feedback (with proper reasoning). Find circuit input impedance, output impedance and voltage gain with feedback.
(15 marks) 4 (b) Draw a current amplifier. State its characteristics. Introduce a negative feedback to it and name the topology. Draw a transistorised circuit to implement the topology. What will be the imporatnt characteristics of the circuit?(5 marks) 5 (a) Determine the value of I_cq, V_ceq, common mode gain, common mode rejection ratio and differential impedance from the following circuit:
(10 marks) 5 (b) Draw a neat circuit diagram of Darlington pair and obtain expression for current gain, input impedance, output impedance. Draw mid frequency model. For derivation neglect h_re and h_oe.(10 marks) 6 (a) Draw a neat circuit diagram of a transistorised Wein bridge oscillator. Explain its working. Deruve expression for frequency of oscillation and find condition for sustained oscillation.(10 marks) 6 (b) Design a RC phase shift oscillator using JFET BFQ 11 for frequenct of oscillation of 1 KHz.(10 marks) 7 (a) Design a class A transformer coupled power amplifier for the following requirements:
O/p AC power = 8W, load resistor = 10Ω, S ≤ 8, V_cc = 15V. Assume transformer efficiency η_T = 90%. Calculate collector efficiency of the designed circuit.(10 marks) 7 (b) Draw a class B push-pull amplifier. Draw suitable waveforms and graphs of ac and dc load lines, input, output waveforms. Derive exp for max collector efficiency. Why this amplifier face problem of cross over distortion? Suggest a suitable method to overcome it. (10 marks)