1. Figure below shows the protected mode addressing mechanism.

1. The selector is used to specify an index into a table defined by the operating system. The table includes the 32-bit base address of a given segment. The physical address is obtained by summing the base address obtained from the table with the offset.
2. With the paging mechanism enabled, the 80386 provides an additional memory management mechanism. The paging feature manages large 80386 segments. The paging mechanism translates the protected linear addresses from the segmentation unit into physical addresses. Figure below shows this translation scheme.
3. Segmentation provides both memory management and protection. All information about the segments is stored in an 8-byte data structure called a descriptor. All the descriptors are stored in tables identified by the 80386 hardware. There are three types of tables holding 80386 descriptors: global descriptor table (GDT), local descriptor table (LDT), and interrupt descriptor table (I DT).

• The GDT contains descriptors which are available to all the tasks in the system. In general, the GDT contains code and data segments used by the operating system, task state segments, and descriptors for LDTs in a system.
• LDTs store descriptors for a given task. Each task has a separate LDT, while the GDT contains descriptors for segments which are common to all tasks.
• The IDT contains the descriptors which point to the location of up to 256 interrupt service routines. Every interrupt used by a system must have an entry into the IDT. The IDT entries are referenced via INT instructions, external interrupt vectors, and exceptions.

The 80386 provides four protection levels for supporting a multitasking operating system to isolate and protect user programs from each other and the operating system.

The privilege level controls the use of privileged instructions, I/O instructions, and access to segments and segment descriptors. The 80386 includes the protection as part of its memory management unit. The four-level hierarchical privilege system is shown in Figure below.

1. It is an extension of the user/ supervisor privilege mode used by minicomputers. Note that the user/supervisor mode is supported by the 80386 paging mechanism. The Privilege Levels (PL) is numbered 0 to 3. Level 0 is the most privileged level.
2. procedures between levels of a task:
   • Data stored in a segment with a privilege level x can be accessed only by code executing at a privilege level at least as privileged as x.
   • A code segment/procedure with privilege level x can only be called by a task executing at the same or a higher privilege level than x.
3. The 80386 supports task gates (protected indirect calls) to provide a secure method of privilege transfers within a task. The 80386 also supports a rapid task switch operation via hardware.
4. Paging is another type of memory management for virtual memory multitasking operating systems. The main difference between paging and segmentation is that paging divides programs/data into several equal-sized pages, while segmentation divides programs/data into several variable-sized segments.
5. There are three elements associated with the 80386 paging mechanism. These are page directory, page tables, and the page itself (page frame). The paging mechanism does not have memory fragmentation since all pages have the same size of 4K bytes.
6. The 80386 takes care of the page address translation process, relieving the burden from an operating system in a demand-paged system. The operating system is responsible for setting up the initial page tables and the handling of any page faults.
7. The operating system initializes the tables by loading CR3 with the address of the page directory and allocates space for the page directory and the page tables. The operating system also implements a swapping policy and handles all of the page faults.