Mumbai University > Computer Engineering > Sem 5 > Microprocessor

Marks: 5M

Year: Dec 2015

1. The math coprocessor 8087 adds 68 mnemonics (instructions) to the 8086 microprocessor instruction set. Specific 8087 math operations include logarithmic, arithmetic, experimental, and trigonometric functions. The 8087 supports integer, floating point and BCD data formats, and fully confirms to the ANSI/IEEE floating point standard.
2. The 8087 math coprocessor is fabricated with HMOS III technology and packaged in a 40-pin cerdip package. The 8087 math coprocessor provides functions meant specifically for high-performance numeric processing requirements.
3. Trigonometric, logarithmic and exponential functions are built into the coprocessor hardware. These functions arc essential in scientific, engineering, navigational or military applications.
4. The microprocessor intercepts and executes the normal instruction set and the coprocessor intercepts and executes only the coprocessor instructions.
5. The coprocessor instructions are actually escape (ESC) instructions. These instructions are used by the microprocessor to generate memory address for the coprocessor so the processor can execute coprocessor instructions.
6. The internal architecture or block diagram of math coprocessor 8087 is shown in Figure below. The architecture of the 8087 is divided into two parts: the control unit, and the numeric execution unit.
7. The Control Unit (CU) keeps the 8087 operating in synchronization with its host CPU. 8087 instructions are intermixed with CPU instructions in a single instruction stream.
8. The CPU fetches all instructions from memory, by monitoring the status of status signals (SO42, and S6).
9. Emitted by the CPU, the control unit determines when an instruction is being fetched. The CPU monitors the data bus in parallel with the CPU to obtain instructions that pertain to the 8087.
10. If the instruction is an ESC instruction, the coprocessor executes it, if not, the microprocessor executes it. The control unit maintains an instruction queue, that is identical to the queue in the host CPU.
11. The control unit automatically identifies if the CPU is an 8086/80186 or an 8088/80188 immediately after reset (by monitoring the BHE/S_7. line) and matches its queue length accordingly. By monitoring the CPU's queue status line (QS_0, and QS_1), the control unit obtains and decodes instruction from the queue in synchronization with the CPU.
12. The Numeric Execution Unit (NEU) is responsible to execute all the coprocessor instructions that involve the register stack: these include arithmetic, logical, transcendental, constant, and data transfer instructions. The data path in the NEU is 84 bits wide (68-bit fractions, 15-bit exponent, and I bit for sign) which allows internal operand transfers to be performed at very high speeds.

1. When the NEU begins executing an instruction, it activates the 8087 BUSY signal indicates 8087 is busy. This signal can be used in conjunction with the CPU WAIT instruction to resynchronize both processors when the NEU has completed its current instruction.
2. The registers include in the NEU are stack registers, status, control, tag, and exception pointers. A few instructions are available to perform data transferring between the coprocessor and the AX register of the microprocessor.
3. The FSTSW AX instruction is the only available instruction to the coprocessor that allows direct communication between coprocessor and microprocessor through the AX register.
4. It is important to note that the coprocessor 8087 does not have FSTSW AX instruction. The stack register within the coprocessor 8087 is 80 bits wide. These stack register always contains an 80-bit extended precision floating point number.